arm64: dts: rockchip: add missing cache properties
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fri, 21 Apr 2023 22:31:48 +0000 (00:31 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 7 May 2023 21:46:47 +0000 (23:46 +0200)
As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  rk3588s-khadas-edge2.dtb: l3-cache: 'cache-unified' is a dependency of 'cache-size'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230421223149.115185-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3308.dtsi
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3588s.dtsi

index dd228a256a32a80230955f7ccc356b6755bc8140..2ae4bb7d5e62a3bb83edf2b3929cc88f880c5902 100644 (file)
@@ -97,6 +97,7 @@
                l2: l2-cache {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 
index 6d7a7bf72ac7eeb8992b823a22688a9fdde369c1..e729e7a22b23a6a2e93374665d6f1ce2d03e9596 100644 (file)
                l2: l2-cache0 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 
index 657c019d27fa9a54012ccbfac0a458656ba1a92d..a3124bd2e092cd5fcb9f5b6ecd1ad089b77afb6b 100644 (file)
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <1024>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <1024>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <1024>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <1024>;
                        cache-level = <2>;
+                       cache-unified;
                        next-level-cache = <&l3_cache>;
                };
 
                        cache-line-size = <64>;
                        cache-sets = <4096>;
                        cache-level = <3>;
+                       cache-unified;
                };
        };