bool "Amiga support"
depends on MMU
select MMU_MOTOROLA if MMU
+ select LEGACY_TIMER_TICK
help
This option enables support for the Amiga series of computers. If
you plan to use this kernel on an Amiga, say Y here and browse the
depends on MMU
select MMU_MOTOROLA if MMU
select HAVE_ARCH_NVRAM_OPS
+ select LEGACY_TIMER_TICK
help
This option enables support for the 68000-based Atari series of
computers (including the TT, Falcon and Medusa). If you plan to use
depends on MMU
select MMU_MOTOROLA if MMU
select HAVE_ARCH_NVRAM_OPS
+ select LEGACY_TIMER_TICK
help
This option enables support for the Apple Macintosh series of
computers (yes, there is experimental support now, at least for part
bool "Apollo support"
depends on MMU
select MMU_MOTOROLA if MMU
+ select LEGACY_TIMER_TICK
help
Say Y here if you want to run Linux on an MC680x0-based Apollo
Domain workstation such as the DN3500.
bool "MVME147 support"
depends on MMU
depends on VME
+ select LEGACY_TIMER_TICK
help
Say Y to include support for early Motorola VME boards. This will
build a kernel which can run on MVME147 single-board computers. If
bool "MVME162, 166 and 167 support"
depends on MMU
depends on VME
+ select LEGACY_TIMER_TICK
help
Say Y to include support for Motorola VME boards. This will build a
kernel which can run on MVME162, MVME166, MVME167, MVME172, and
bool "BVME4000 and BVME6000 support"
depends on MMU
depends on VME
+ select LEGACY_TIMER_TICK
help
Say Y to include support for VME boards from BVM Ltd. This will
build a kernel which can run on BVME4000 and BVME6000 boards. If
bool "HP9000/300 and HP9000/400 support"
depends on MMU
select MMU_MOTOROLA if MMU
+ select LEGACY_TIMER_TICK
help
This option enables support for the HP9000/300 and HP9000/400 series
of workstations. Support for these machines is still somewhat
bool "Q40/Q60 support"
depends on MMU
select MMU_MOTOROLA if MMU
+ select LEGACY_TIMER_TICK
help
The Q40 is a Motorola 68040-based successor to the Sinclair QL
manufactured in Germany. There is an official Q40 home page at
static irqreturn_t ciab_timer_handler(int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
-
clk_total += jiffy_ticks;
clk_offset = 0;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
timer_heartbeat();
return IRQ_HANDLED;
* SCSI code. We'll have to take a look at this later
*/
if (request_irq(IRQ_AMIGA_CIAB_TA, ciab_timer_handler, IRQF_TIMER,
- "timer", timer_routine))
+ "timer", NULL))
pr_err("Couldn't register timer interrupt\n");
/* start timer */
ciab.cra |= 0x11;
irqreturn_t dn_timer_int(int irq, void *dev_id)
{
- irq_handler_t timer_handler = dev_id;
-
volatile unsigned char x;
- timer_handler(irq, dev_id);
+ legacy_timer_tick(1);
timer_heartbeat();
x = *(volatile unsigned char *)(apollo_timer + 3);
*(volatile unsigned char *)(apollo_timer + 0x3));
#endif
- if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
+ if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", NULL))
pr_err("Couldn't register timer interrupt\n");
}
static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
unsigned long flags;
local_irq_save(flags);
last_timer_count = st_mfp.tim_dt_c;
} while (last_timer_count == 1);
clk_total += INT_TICKS;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
timer_heartbeat();
local_irq_restore(flags);
st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
/* install interrupt service routine for MFP Timer C */
if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, IRQF_TIMER, "timer",
- timer_routine))
+ NULL))
pr_err("Couldn't register timer interrupt\n");
clocksource_register_hz(&atari_clk, INT_CLK);
static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
unsigned long flags;
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
unsigned char msr;
rtc->msr = msr | 0x20; /* Ack the interrupt */
clk_total += RTC_TIMER_CYCLES;
clk_offset = 0;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
local_irq_restore(flags);
return IRQ_HANDLED;
rtc->msr = 0; /* Ensure timer registers accessible */
if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer",
- timer_routine))
+ NULL))
panic ("Couldn't register timer int");
rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
static irqreturn_t hp300_tick(int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
unsigned long flags;
unsigned long tmp;
asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
clk_total += INTVAL;
clk_offset = 0;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
timer_heartbeat();
local_irq_restore(flags);
asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
- if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", vector))
+ if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", NULL))
pr_err("Couldn't register timer interrupt\n");
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
static irqreturn_t via_timer_handler(int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
-
clk_total += VIA_TIMER_CYCLES;
clk_offset = 0;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
return IRQ_HANDLED;
}
void __init via_init_clock(irq_handler_t timer_routine)
{
if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer",
- timer_routine)) {
+ NULL)) {
pr_err("Couldn't register %s interrupt\n", "timer");
return;
}
static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
unsigned long flags;
local_irq_save(flags);
m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF;
clk_total += PCC_TIMER_CYCLES;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
local_irq_restore(flags);
return IRQ_HANDLED;
void mvme147_sched_init (irq_handler_t timer_routine)
{
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
- "timer 1", timer_routine))
+ "timer 1", NULL))
pr_err("Couldn't register timer interrupt\n");
/* Init the clock with a value */
static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
unsigned long flags;
local_irq_save(flags);
out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
clk_total += PCC_TIMER_CYCLES;
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
local_irq_restore(flags);
return IRQ_HANDLED;
out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
out_8(PCCTIC1, PCCTIC1_INT_EN | 6);
if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
- timer_routine))
+ NULL))
panic ("Couldn't register timer int");
clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
static irqreturn_t q40_timer_int(int irq, void *dev_id)
{
- irq_handler_t timer_routine = dev_id;
-
ql_ticks = ql_ticks ? 0 : 1;
if (sound_ticks) {
unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
unsigned long flags;
local_irq_save(flags);
- timer_routine(0, NULL);
+ legacy_timer_tick(1);
timer_heartbeat();
local_irq_restore(flags);
}
timer_irq = Q40_IRQ_FRAME;
- if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine))
+ if (request_irq(timer_irq, q40_timer_int, 0, "timer", NULL))
panic("Couldn't register timer int");
master_outb(-1, FRAME_CLEAR_REG);