s390/rwonce: add READ_ONCE_ALIGNED_128() macro

Add an s390 specific READ_ONCE_ALIGNED_128() helper, which can be used for
fast block concurrent (atomic) 128-bit accesses.

The used lpq instruction requires 128-bit alignment. This is also the
reason why the compiler doesn't emit this instruction if __READ_ONCE() is
used for 128-bit accesses.

Link: https://lore.kernel.org/r/20230224100237.3247871-2-hca@linux.ibm.com
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>

diff --git a/arch/s390/include/asm/rwonce.h b/arch/s390/include/asm/rwonce.h
new file mode 100644 (file)
index 0000000..91fc245
--- /dev/null
+++ b/arch/s390/include/asm/rwonce.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __ASM_S390_RWONCE_H
+#define __ASM_S390_RWONCE_H
+
+#include <linux/compiler_types.h>
+
+/*
+ * Use READ_ONCE_ALIGNED_128() for 128-bit block concurrent (atomic) read
+ * accesses. Note that x must be 128-bit aligned, otherwise a specification
+ * exception is generated.
+ */
+#define READ_ONCE_ALIGNED_128(x)                       \
+({                                                     \
+       union {                                         \
+               typeof(x) __x;                          \
+               __uint128_t val;                        \
+       } __u;                                          \
+                                                       \
+       BUILD_BUG_ON(sizeof(x) != 16);                  \
+       asm volatile(                                   \
+               "       lpq     %[val],%[_x]\n"         \
+               : [val] "=d" (__u.val)                  \
+               : [_x] "QS" (x)                         \
+               : "memory");                            \
+       __u.__x;                                        \
+})
+
+#include <asm-generic/rwonce.h>
+
+#endif /* __ASM_S390_RWONCE_H */