igc: Add new device ID's
authorSasha Neftin <sasha.neftin@intel.com>
Mon, 3 Aug 2020 18:33:58 +0000 (21:33 +0300)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Mon, 28 Sep 2020 21:42:45 +0000 (14:42 -0700)
Add new device ID's for the next step of the silicon and
reflect i221 and i226 parts

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/igc/igc_base.c
drivers/net/ethernet/intel/igc/igc_hw.h
drivers/net/ethernet/intel/igc/igc_main.c

index cc5a6cf531c73db812750dc2b91c4f4b3ffc8d3c..fd37d2c203af784dfe4e4988f600de047a1f6fca 100644 (file)
@@ -215,6 +215,11 @@ static s32 igc_get_invariants_base(struct igc_hw *hw)
        case IGC_DEV_ID_I225_K2:
        case IGC_DEV_ID_I225_LMVP:
        case IGC_DEV_ID_I225_IT:
+       case IGC_DEV_ID_I226_LM:
+       case IGC_DEV_ID_I226_V:
+       case IGC_DEV_ID_I226_IT:
+       case IGC_DEV_ID_I221_V:
+       case IGC_DEV_ID_I226_BLANK_NVM:
        case IGC_DEV_ID_I225_BLANK_NVM:
                mac->type = igc_i225;
                break;
index b9fe51b91c473b36334fbd9785398d20e3143987..6defdb8a31fe8e01bfc06df42f70e5c757fd7a1e 100644 (file)
 #define IGC_DEV_ID_I225_K2                     0x3101
 #define IGC_DEV_ID_I225_LMVP                   0x5502
 #define IGC_DEV_ID_I225_IT                     0x0D9F
+#define IGC_DEV_ID_I226_LM                     0x125B
+#define IGC_DEV_ID_I226_V                      0x125C
+#define IGC_DEV_ID_I226_IT                     0x125D
+#define IGC_DEV_ID_I221_V                      0x125E
+#define IGC_DEV_ID_I226_BLANK_NVM              0x125F
 #define IGC_DEV_ID_I225_BLANK_NVM              0x15FD
 
 /* Function pointers for the MAC. */
index 3183150c7995587730673b9157b78bd561f716d9..b46bc8ded836871daa6a389b0b99f74bff84637c 100644 (file)
@@ -47,6 +47,11 @@ static const struct pci_device_id igc_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_K2), board_base },
        { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_LMVP), board_base },
        { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_IT), board_base },
+       { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_LM), board_base },
+       { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_V), board_base },
+       { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_IT), board_base },
+       { PCI_VDEVICE(INTEL, IGC_DEV_ID_I221_V), board_base },
+       { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_BLANK_NVM), board_base },
        { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_BLANK_NVM), board_base },
        /* required last entry */
        {0, }