{
        struct gpio_bank *bank;
        unsigned long flags;
+       int ret = NOTIFY_OK;
+       u32 isr, mask;
 
        bank = container_of(nb, struct gpio_bank, nb);
 
        raw_spin_lock_irqsave(&bank->lock, flags);
+       if (bank->is_suspended)
+               goto out_unlock;
+
        switch (cmd) {
        case CPU_CLUSTER_PM_ENTER:
-               if (bank->is_suspended)
+               mask = omap_get_gpio_irqbank_mask(bank);
+               isr = readl_relaxed(bank->base + bank->regs->irqstatus) & mask;
+               if (isr) {
+                       ret = NOTIFY_BAD;
                        break;
+               }
                omap_gpio_idle(bank, true);
                break;
        case CPU_CLUSTER_PM_ENTER_FAILED:
        case CPU_CLUSTER_PM_EXIT:
-               if (bank->is_suspended)
-                       break;
                omap_gpio_unidle(bank);
                break;
        }
+
+out_unlock:
        raw_spin_unlock_irqrestore(&bank->lock, flags);
 
-       return NOTIFY_OK;
+       return ret;
 }
 
 static const struct omap_gpio_reg_offs omap2_gpio_regs = {