riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks

Add DVP and HDMI TX pixel external fixed clocks and the rates are
74.25MHz and 297MHz.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a75fbcf089c4349b836a63edb64b4e..de0f40a8be934fe1316dbb901030b8393ff39ed3 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -38,6 +38,10 @@
        };
 };
 
+&dvp_clk {
+       clock-frequency = <74250000>;
+};
+
 &gmac0_rgmii_rxin {
        clock-frequency = <125000000>;
 };
@@ -54,6 +58,10 @@
        clock-frequency = <50000000>;
 };
 
+&hdmitx0_pixelclk {
+       clock-frequency = <297000000>;
+};
+
 &i2srx_bclk_ext {
        clock-frequency = <12288000>;
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index ec2e70011a73673669babb53323b9ee5240355c0..e9c1e4ad71a28eabb5819b6c3fd6442deba1e437 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -197,6 +197,12 @@
                        };
        };
 
+       dvp_clk: dvp-clock {
+               compatible = "fixed-clock";
+               clock-output-names = "dvp_clk";
+               #clock-cells = <0>;
+       };
+
        gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock {
                compatible = "fixed-clock";
                clock-output-names = "gmac0_rgmii_rxin";
@@ -221,6 +227,12 @@
                #clock-cells = <0>;
        };
 
+       hdmitx0_pixelclk: hdmitx0-pixel-clock {
+               compatible = "fixed-clock";
+               clock-output-names = "hdmitx0_pixelclk";
+               #clock-cells = <0>;
+       };
+
        i2srx_bclk_ext: i2srx-bclk-ext-clock {
                compatible = "fixed-clock";
                clock-output-names = "i2srx_bclk_ext";