{
if (s->writeback_mask & (1 << regno)) {
if (give_temp) {
- tcg_temp_free(s->writeback[regno]);
s->writeback[regno] = val;
} else {
tcg_gen_mov_i32(s->writeback[regno], val);
do {
unsigned regno = ctz32(mask);
tcg_gen_mov_i32(cpu_aregs[regno], s->writeback[regno]);
- tcg_temp_free(s->writeback[regno]);
mask &= mask - 1;
} while (mask);
}
tmp = tcg_const_i32(nr);
gen_helper_raise_exception(cpu_env, tmp);
- tcg_temp_free_i32(tmp);
}
static void gen_raise_exception_format2(DisasContext *s, int nr,
gen_ext(t0, t0, s->cc_op - CC_OP_ADDB, 1);
tcg_gen_xor_i32(t1, QREG_CC_N, QREG_CC_V);
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_V, t0);
- tcg_temp_free(t0);
tcg_gen_andc_i32(QREG_CC_V, t1, QREG_CC_V);
- tcg_temp_free(t1);
break;
case CC_OP_SUBB:
gen_ext(t0, t0, s->cc_op - CC_OP_SUBB, 1);
tcg_gen_xor_i32(t1, QREG_CC_N, t0);
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_V, t0);
- tcg_temp_free(t0);
tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, t1);
- tcg_temp_free(t1);
break;
case CC_OP_CMPB:
tcg_gen_xor_i32(t0, QREG_CC_Z, QREG_CC_N);
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_V, QREG_CC_N);
tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, t0);
- tcg_temp_free(t0);
tcg_gen_mov_i32(QREG_CC_N, QREG_CC_Z);
break;
default:
t0 = tcg_const_i32(s->cc_op);
gen_helper_flush_flags(cpu_env, t0);
- tcg_temp_free(t0);
s->cc_op_synced = 1;
break;
}
tmp = tcg_temp_new();
tcg_gen_ext8u_i32(tmp, val);
tcg_gen_or_i32(reg, reg, tmp);
- tcg_temp_free(tmp);
break;
case OS_WORD:
tcg_gen_andi_i32(reg, reg, 0xffff0000);
tmp = tcg_temp_new();
tcg_gen_ext16u_i32(tmp, val);
tcg_gen_or_i32(reg, reg, tmp);
- tcg_temp_free(tmp);
break;
case OS_LONG:
case OS_SINGLE:
t32 = tcg_temp_new();
tcg_gen_ld16u_i32(t32, src, offsetof(FPReg, l.upper));
tcg_gen_st16_i32(t32, dest, offsetof(FPReg, l.upper));
- tcg_temp_free(t32);
t64 = tcg_temp_new_i64();
tcg_gen_ld_i64(t64, src, offsetof(FPReg, l.lower));
tcg_gen_st_i64(t64, dest, offsetof(FPReg, l.lower));
- tcg_temp_free_i64(t64);
}
static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
default:
g_assert_not_reached();
}
- tcg_temp_free(tmp);
- tcg_temp_free_i64(t64);
}
static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
default:
g_assert_not_reached();
}
- tcg_temp_free(tmp);
- tcg_temp_free_i64(t64);
}
static void gen_ldst_fp(DisasContext *s, int opsize, TCGv addr,
default:
g_assert_not_reached();
}
- tcg_temp_free(tmp);
}
return 0;
case 1: /* Address register direct. */
case OS_BYTE:
tmp = tcg_const_i32((int8_t)read_im8(env, s));
gen_helper_exts32(cpu_env, fp, tmp);
- tcg_temp_free(tmp);
break;
case OS_WORD:
tmp = tcg_const_i32((int16_t)read_im16(env, s));
gen_helper_exts32(cpu_env, fp, tmp);
- tcg_temp_free(tmp);
break;
case OS_LONG:
tmp = tcg_const_i32(read_im32(env, s));
gen_helper_exts32(cpu_env, fp, tmp);
- tcg_temp_free(tmp);
break;
case OS_SINGLE:
tmp = tcg_const_i32(read_im32(env, s));
gen_helper_extf32(cpu_env, fp, tmp);
- tcg_temp_free(tmp);
break;
case OS_DOUBLE:
t64 = tcg_const_i64(read_im64(env, s));
gen_helper_extf64(cpu_env, fp, t64);
- tcg_temp_free_i64(t64);
break;
case OS_EXTENDED:
if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) {
}
tmp = tcg_const_i32(read_im32(env, s) >> 16);
tcg_gen_st16_i32(tmp, fp, offsetof(FPReg, l.upper));
- tcg_temp_free(tmp);
t64 = tcg_const_i64(read_im64(env, s));
tcg_gen_st_i64(t64, fp, offsetof(FPReg, l.lower));
- tcg_temp_free_i64(t64);
break;
case OS_PACKED:
/*
tmp2 = tcg_temp_new();
tcg_gen_xor_i32(tmp2, QREG_CC_N, QREG_CC_V);
tcg_gen_or_i32(tmp, tmp, tmp2);
- tcg_temp_free(tmp2);
tcond = TCG_COND_LT;
break;
}
tcg_gen_neg_i32(tmp, tmp);
DEST_EA(env, insn, OS_BYTE, tmp, NULL);
- tcg_temp_free(tmp);
}
DISAS_INSN(dbcc)
tcg_gen_mul_i32(tmp, tmp, src);
tcg_gen_mov_i32(reg, tmp);
gen_logic_cc(s, tmp, OS_LONG);
- tcg_temp_free(tmp);
}
DISAS_INSN(divw)
tcg_gen_andi_i32(t0, t0, 0x22);
tcg_gen_add_i32(dest, t0, t0);
tcg_gen_add_i32(dest, dest, t0);
- tcg_temp_free(t0);
/*
* remove the exceeding 0x6
*/
tcg_gen_sub_i32(dest, t1, dest);
- tcg_temp_free(t1);
}
static void bcd_sub(TCGv dest, TCGv src)
tcg_gen_andi_i32(t2, t2, 0x22);
tcg_gen_add_i32(t0, t2, t2);
tcg_gen_add_i32(t0, t0, t2);
- tcg_temp_free(t2);
/* return t1 - t0 */
tcg_gen_sub_i32(dest, t1, t0);
- tcg_temp_free(t0);
- tcg_temp_free(t1);
}
static void bcd_flags(TCGv val)
DEST_EA(env, insn, OS_BYTE, dest, &addr);
bcd_flags(dest);
-
- tcg_temp_free(dest);
}
DISAS_INSN(addsub)
} else {
gen_partset_reg(opsize, DREG(insn, 9), dest);
}
- tcg_temp_free(dest);
}
/* Reverse the order of the bits in REG. */
tmp = tcg_const_i32(1);
tcg_gen_shl_i32(tmp, tmp, src2);
- tcg_temp_free(src2);
tcg_gen_and_i32(QREG_CC_Z, src1, tmp);
default: /* btst */
break;
}
- tcg_temp_free(tmp);
if (op) {
DEST_EA(env, insn, opsize, dest, &addr);
}
- tcg_temp_free(dest);
}
DISAS_INSN(sats)
tcg_gen_subi_i32(tmp, QREG_SP, 4);
gen_store(s, OS_LONG, tmp, val, IS_USER(s));
tcg_gen_mov_i32(QREG_SP, tmp);
- tcg_temp_free(tmp);
}
static TCGv mreg(int reg)
for (i = 0; i < 16; i++) {
if (mask & (1 << i)) {
tcg_gen_mov_i32(mreg(i), r[i]);
- tcg_temp_free(r[i]);
}
}
if (mode == 3) {
tmp = tcg_temp_new();
tcg_gen_sub_i32(tmp, cpu_aregs[reg0], incr);
gen_store(s, opsize, addr, tmp, IS_USER(s));
- tcg_temp_free(tmp);
} else {
gen_store(s, opsize, addr, mreg(i), IS_USER(s));
}
}
}
}
-
- tcg_temp_free(incr);
- tcg_temp_free(addr);
}
DISAS_INSN(movep)
}
}
}
- tcg_temp_free(abuf);
- tcg_temp_free(dbuf);
}
DISAS_INSN(bitop_im)
break;
}
DEST_EA(env, insn, opsize, tmp, &addr);
- tcg_temp_free(tmp);
}
}
sr = tcg_temp_new();
tcg_gen_andi_i32(sr, QREG_SR, 0xffe0);
tcg_gen_or_i32(sr, sr, ccr);
- tcg_temp_free(ccr);
return sr;
}
default:
abort();
}
- tcg_temp_free(im);
- tcg_temp_free(dest);
}
DISAS_INSN(cas)
gen_update_cc_cmp(s, load, cmp, opsize);
gen_partset_reg(opsize, DREG(ext, 0), load);
- tcg_temp_free(load);
-
switch (extract32(insn, 3, 3)) {
case 3: /* Indirect postincrement. */
tcg_gen_addi_i32(AREG(insn, 0), addr, opsize_bytes(opsize));
} else {
gen_helper_cas2w(cpu_env, regs, addr1, addr2);
}
- tcg_temp_free(regs);
/* Note that cas2w also assigned to env->cc_op. */
s->cc_op = CC_OP_CMPW;
} else {
gen_helper_cas2l(cpu_env, regs, addr1, addr2);
}
- tcg_temp_free(regs);
/* Note that cas2l also assigned to env->cc_op. */
s->cc_op = CC_OP_CMPL;
z = tcg_const_i32(0);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, src, z, QREG_CC_X, z);
tcg_gen_sub2_i32(QREG_CC_N, QREG_CC_X, z, z, QREG_CC_N, QREG_CC_X);
- tcg_temp_free(z);
gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1);
tcg_gen_andi_i32(QREG_CC_X, QREG_CC_X, 1);
opsize = insn_opsize(insn);
DEST_EA(env, insn, opsize, zero, NULL);
gen_logic_cc(s, zero, opsize);
- tcg_temp_free(zero);
}
DISAS_INSN(move_from_ccr)
gen_update_cc_add(dest, src1, opsize);
tcg_gen_setcondi_i32(TCG_COND_NE, QREG_CC_X, dest, 0);
DEST_EA(env, insn, opsize, dest, &addr);
- tcg_temp_free(dest);
}
DISAS_INSN(move_to_ccr)
tcg_gen_shli_i32(src1, reg, 16);
tcg_gen_shri_i32(src2, reg, 16);
tcg_gen_or_i32(reg, src1, src2);
- tcg_temp_free(src2);
- tcg_temp_free(src1);
gen_logic_cc(s, reg, OS_LONG);
}
else
tcg_gen_mov_i32(reg, tmp);
gen_logic_cc(s, tmp, OS_LONG);
- tcg_temp_free(tmp);
}
DISAS_INSN(tst)
tcg_gen_atomic_fetch_or_tl(src1, addr, tcg_constant_tl(0x80),
IS_USER(s), MO_SB);
gen_logic_cc(s, src1, OS_BYTE);
- tcg_temp_free(src1);
switch (mode) {
case 3: /* Indirect postincrement. */
tcg_gen_mov_i32(reg, tmp);
}
tcg_gen_addi_i32(QREG_SP, tmp, offset);
- tcg_temp_free(tmp);
}
DISAS_INSN(link)
tmp = gen_load(s, OS_LONG, src, 0, IS_USER(s));
tcg_gen_mov_i32(reg, tmp);
tcg_gen_addi_i32(QREG_SP, src, 4);
- tcg_temp_free(src);
- tcg_temp_free(tmp);
}
#if defined(CONFIG_SOFTMMU)
tcg_gen_addi_i32(sp, QREG_SP, 2);
tmp = gen_load(s, OS_LONG, sp, 0, IS_USER(s));
tcg_gen_addi_i32(QREG_SP, sp, 4);
- tcg_temp_free(sp);
gen_set_sr(s, ccr, true);
- tcg_temp_free(ccr);
gen_jmp(s, tmp);
}
}
gen_update_cc_add(dest, val, opsize);
}
- tcg_temp_free(val);
DEST_EA(env, insn, opsize, dest, &addr);
- tcg_temp_free(dest);
}
DISAS_INSN(branch)
gen_partset_reg(opsize, DREG(insn, 9), dest);
}
gen_logic_cc(s, dest, opsize);
- tcg_temp_free(dest);
}
DISAS_INSN(suba)
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, dest);
tcg_gen_xor_i32(tmp, dest, src);
tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, tmp);
- tcg_temp_free(tmp);
/* Copy the rest of the results into place. */
tcg_gen_or_i32(QREG_CC_Z, QREG_CC_Z, QREG_CC_N); /* !Z is sticky */
gen_subx(s, src, dest, opsize);
gen_store(s, opsize, addr_dest, QREG_CC_N, IS_USER(s));
-
- tcg_temp_free(dest);
- tcg_temp_free(src);
}
DISAS_INSN(mov3q)
src = tcg_const_i32(val);
gen_logic_cc(s, src, OS_LONG);
DEST_EA(env, insn, OS_LONG, src, NULL);
- tcg_temp_free(src);
}
DISAS_INSN(cmp)
tcg_gen_xor_i32(dest, src, DREG(insn, 9));
gen_logic_cc(s, dest, opsize);
DEST_EA(env, insn, opsize, dest, &addr);
- tcg_temp_free(dest);
}
static void do_exg(TCGv reg1, TCGv reg2)
tcg_gen_mov_i32(temp, reg1);
tcg_gen_mov_i32(reg1, reg2);
tcg_gen_mov_i32(reg2, temp);
- tcg_temp_free(temp);
}
DISAS_INSN(exg_dd)
gen_partset_reg(opsize, reg, dest);
}
gen_logic_cc(s, dest, opsize);
- tcg_temp_free(dest);
}
DISAS_INSN(adda)
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, src);
tcg_gen_xor_i32(tmp, dest, src);
tcg_gen_andc_i32(QREG_CC_V, QREG_CC_V, tmp);
- tcg_temp_free(tmp);
/* Copy the rest of the results into place. */
tcg_gen_or_i32(QREG_CC_Z, QREG_CC_Z, QREG_CC_N); /* !Z is sticky */
gen_addx(s, src, dest, opsize);
gen_store(s, opsize, addr_dest, QREG_CC_N, IS_USER(s));
-
- tcg_temp_free(dest);
- tcg_temp_free(src);
}
static inline void shift_im(DisasContext *s, uint16_t insn, int opsize)
tcg_gen_sari_i32(QREG_CC_V, reg, bits - 1);
tcg_gen_sari_i32(t0, reg, bits - count - 1);
tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, t0);
- tcg_temp_free(t0);
}
tcg_gen_neg_i32(QREG_CC_V, QREG_CC_V);
}
tcg_gen_shri_i32(QREG_CC_C, QREG_CC_N, bits);
tcg_gen_movcond_i32(TCG_COND_EQ, QREG_CC_C,
s32, zero, zero, QREG_CC_C);
- tcg_temp_free(zero);
}
tcg_gen_andi_i32(QREG_CC_C, QREG_CC_C, 1);
TCGv_i64 tt = tcg_const_i64(32);
/* if shift is greater than 32, use 32 */
tcg_gen_movcond_i64(TCG_COND_GT, s64, s64, tt, tt, s64);
- tcg_temp_free_i64(tt);
/* Sign extend the input to 64 bits; re-do the shift. */
tcg_gen_ext_i32_i64(t64, reg);
tcg_gen_shl_i64(s64, t64, s64);
gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1);
tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N);
- tcg_temp_free(s32);
- tcg_temp_free_i64(s64);
- tcg_temp_free_i64(t64);
-
/* Write back the result. */
gen_partset_reg(opsize, DREG(insn, 0), QREG_CC_N);
set_cc_op(s, CC_OP_FLAGS);
/* shx = shx < 0 ? size : shx; */
zero = tcg_const_i32(0);
tcg_gen_movcond_i32(TCG_COND_LT, shx, shx, zero, sz, shx);
- tcg_temp_free(zero);
} else {
tcg_gen_mov_i32(shr, shift); /* shr = shift */
tcg_gen_movi_i32(shl, size + 1);
tcg_gen_sub_i32(shl, shl, shift); /* shl = size + 1 - shift */
tcg_gen_sub_i32(shx, sz, shift); /* shx = size - shift */
}
- tcg_temp_free_i32(sz);
/* reg = (reg << shl) | (reg >> shr) | (x << shx); */
tcg_gen_shl_i32(shl, reg, shl);
tcg_gen_shr_i32(shr, reg, shr);
tcg_gen_or_i32(reg, shl, shr);
- tcg_temp_free(shl);
- tcg_temp_free(shr);
tcg_gen_shl_i32(shx, QREG_CC_X, shx);
tcg_gen_or_i32(reg, reg, shx);
- tcg_temp_free(shx);
/* X = (reg >> size) & 1 */
/* rotate */
tcg_gen_rotl_i64(t0, t0, shift64);
- tcg_temp_free_i64(shift64);
/* result is [reg:..:reg:X] */
tcg_gen_concat_i32_i64(t0, reg, QREG_CC_X);
tcg_gen_rotr_i64(t0, t0, shift64);
- tcg_temp_free_i64(shift64);
/* result is value: [X:reg:..:reg] */
tcg_gen_shli_i32(hi, hi, 1);
}
- tcg_temp_free_i64(t0);
tcg_gen_or_i32(lo, lo, hi);
- tcg_temp_free(hi);
/* if shift == 0, register and X are not affected */
zero = tcg_const_i32(0);
tcg_gen_movcond_i32(TCG_COND_EQ, X, shift, zero, QREG_CC_X, X);
tcg_gen_movcond_i32(TCG_COND_EQ, reg, shift, zero, reg, lo);
- tcg_temp_free(zero);
- tcg_temp_free(lo);
return X;
}
} else {
TCGv X = rotate32_x(DREG(insn, 0), shift, left);
rotate_x_flags(DREG(insn, 0), X, 32);
- tcg_temp_free(X);
}
- tcg_temp_free(shift);
set_cc_op(s, CC_OP_FLAGS);
}
} else {
TCGv X = rotate_x(reg, shift, left, 8);
rotate_x_flags(reg, X, 8);
- tcg_temp_free(X);
}
- tcg_temp_free(shift);
gen_partset_reg(OS_BYTE, DREG(insn, 0), reg);
set_cc_op(s, CC_OP_FLAGS);
}
} else {
TCGv X = rotate_x(reg, shift, left, 16);
rotate_x_flags(reg, X, 16);
- tcg_temp_free(X);
}
- tcg_temp_free(shift);
gen_partset_reg(OS_WORD, DREG(insn, 0), reg);
set_cc_op(s, CC_OP_FLAGS);
}
tcg_gen_remu_i32(t1, t0, t1);
X = rotate32_x(DREG(insn, 0), t1, left);
rotate_x_flags(DREG(insn, 0), X, 32);
- tcg_temp_free(X);
}
- tcg_temp_free(t1);
- tcg_temp_free(t0);
set_cc_op(s, CC_OP_FLAGS);
}
tcg_gen_remu_i32(t1, t0, t1);
X = rotate_x(reg, t1, left, 8);
rotate_x_flags(reg, X, 8);
- tcg_temp_free(X);
}
- tcg_temp_free(t1);
- tcg_temp_free(t0);
gen_partset_reg(OS_BYTE, DREG(insn, 0), reg);
set_cc_op(s, CC_OP_FLAGS);
}
tcg_gen_remu_i32(t1, t0, t1);
X = rotate_x(reg, t1, left, 16);
rotate_x_flags(reg, X, 16);
- tcg_temp_free(X);
}
- tcg_temp_free(t1);
- tcg_temp_free(t0);
gen_partset_reg(OS_WORD, DREG(insn, 0), reg);
set_cc_op(s, CC_OP_FLAGS);
}
} else {
TCGv X = rotate_x(src, shift, left, 16);
rotate_x_flags(src, X, 16);
- tcg_temp_free(X);
}
- tcg_temp_free(shift);
DEST_EA(env, insn, OS_WORD, src, &addr);
set_cc_op(s, CC_OP_FLAGS);
}
} else {
tcg_gen_shr_i32(dst, tmp, shift);
}
- tcg_temp_free(shift);
} else {
/* Immediate width. */
if (ext & 0x800) {
}
}
- tcg_temp_free(tmp);
set_cc_op(s, CC_OP_LOGIC);
}
TCGv_i64 tmp = tcg_temp_new_i64();
gen_helper_bfextu_mem(tmp, cpu_env, addr, ofs, len);
tcg_gen_extr_i64_i32(dest, QREG_CC_N, tmp);
- tcg_temp_free_i64(tmp);
}
set_cc_op(s, CC_OP_LOGIC);
-
- if (!(ext & 0x20)) {
- tcg_temp_free(len);
- }
- if (!(ext & 0x800)) {
- tcg_temp_free(ofs);
- }
}
DISAS_INSN(bfop_reg)
tcg_gen_movi_i32(tofs, ofs);
}
}
- tcg_temp_free(tmp);
}
set_cc_op(s, CC_OP_LOGIC);
break;
case 0x0d00: /* bfffo */
gen_helper_bfffo_reg(DREG(ext, 12), QREG_CC_N, tofs, tlen);
- tcg_temp_free(tlen);
- tcg_temp_free(tofs);
break;
case 0x0e00: /* bfset */
tcg_gen_orc_i32(src, src, mask);
default:
g_assert_not_reached();
}
- tcg_temp_free(mask);
}
DISAS_INSN(bfop_mem)
t64 = tcg_temp_new_i64();
gen_helper_bfffo_mem(t64, cpu_env, addr, ofs, len);
tcg_gen_extr_i64_i32(DREG(ext, 12), QREG_CC_N, t64);
- tcg_temp_free_i64(t64);
break;
case 0x0e00: /* bfset */
gen_helper_bfset_mem(QREG_CC_N, cpu_env, addr, ofs, len);
g_assert_not_reached();
}
set_cc_op(s, CC_OP_LOGIC);
-
- if (!(ext & 0x20)) {
- tcg_temp_free(len);
- }
- if (!(ext & 0x800)) {
- tcg_temp_free(ofs);
- }
}
DISAS_INSN(bfins_reg)
tcg_gen_rotr_i32(tmp, tmp, rot);
tcg_gen_and_i32(dst, dst, mask);
tcg_gen_or_i32(dst, dst, tmp);
-
- tcg_temp_free(rot);
- tcg_temp_free(mask);
}
- tcg_temp_free(tmp);
}
DISAS_INSN(bfins_mem)
gen_helper_bfins_mem(QREG_CC_N, cpu_env, addr, src, ofs, len);
set_cc_op(s, CC_OP_LOGIC);
-
- if (!(ext & 0x20)) {
- tcg_temp_free(len);
- }
- if (!(ext & 0x800)) {
- tcg_temp_free(ofs);
- }
}
DISAS_INSN(ff1)
tcg_gen_addi_i32(addr2, addr1, opsize_bytes(opsize));
bound1 = gen_load(s, opsize, addr1, 1, IS_USER(s));
- tcg_temp_free(addr1);
bound2 = gen_load(s, opsize, addr2, 1, IS_USER(s));
- tcg_temp_free(addr2);
reg = tcg_temp_new();
if (ext & 0x8000) {
gen_flush_flags(s);
gen_helper_chk2(cpu_env, reg, bound1, bound2);
- tcg_temp_free(reg);
- tcg_temp_free(bound1);
- tcg_temp_free(bound2);
}
static void m68k_copy_line(TCGv dst, TCGv src, int index)
tcg_gen_qemu_st64(t0, addr, index);
tcg_gen_addi_i32(addr, addr, 8);
tcg_gen_qemu_st64(t1, addr, index);
-
- tcg_temp_free_i64(t0);
- tcg_temp_free_i64(t1);
- tcg_temp_free(addr);
}
DISAS_INSN(move16_reg)
tcg_gen_mov_i32(tmp, AREG(ext, 12));
tcg_gen_addi_i32(AREG(insn, 0), AREG(insn, 0), 16);
tcg_gen_addi_i32(AREG(ext, 12), tmp, 16);
- tcg_temp_free(tmp);
}
DISAS_INSN(move16_mem)
m68k_copy_line(addr, reg, index);
}
- tcg_temp_free(addr);
-
if (((insn >> 3) & 2) == 0) {
/* (Ay)+ */
tcg_gen_addi_i32(reg, reg, 16);
} else {
gen_partset_reg(opsize, reg, tmp);
}
- tcg_temp_free(tmp);
}
switch (extract32(insn, 3, 3)) {
case 3: /* Indirect postincrement. */
opmode = tcg_const_i32((insn >> 3) & 3);
gen_helper_pflush(cpu_env, AREG(insn, 0), opmode);
- tcg_temp_free(opmode);
}
DISAS_INSN(ptest)
}
is_read = tcg_const_i32((insn >> 5) & 1);
gen_helper_ptest(cpu_env, AREG(insn, 0), is_read);
- tcg_temp_free(is_read);
}
#endif
tmp = tcg_temp_new();
gen_load_fcr(s, tmp, reg);
tcg_gen_qemu_st32(tmp, addr, index);
- tcg_temp_free(tmp);
}
static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
tmp = tcg_temp_new();
tcg_gen_qemu_ld32u(tmp, addr, index);
gen_store_fcr(s, tmp, reg);
- tcg_temp_free(tmp);
}
}
tmp = tcg_const_i32(read_im32(env, s));
gen_store_fcr(s, tmp, mask);
- tcg_temp_free(tmp);
return;
}
break;
tcg_gen_mov_i32(AREG(insn, 0), addr);
}
}
- tcg_temp_free_i32(addr);
}
static void gen_op_fmovem(CPUM68KState *env, DisasContext *s,
if ((insn & 070) == 030 || (insn & 070) == 040) {
tcg_gen_mov_i32(AREG(insn, 0), tmp);
}
- tcg_temp_free(tmp);
}
/*
TCGv rom_offset = tcg_const_i32(opmode);
cpu_dest = gen_fp_ptr(REG(ext, 7));
gen_helper_fconst(cpu_env, cpu_dest, rom_offset);
- tcg_temp_free_ptr(cpu_dest);
- tcg_temp_free(rom_offset);
return;
}
break;
gen_addr_fault(s);
}
gen_helper_ftst(cpu_env, cpu_src);
- tcg_temp_free_ptr(cpu_src);
return;
case 4: /* fmove to control register. */
case 5: /* fmove from control register. */
case 0x36: case 0x37: {
TCGv_ptr cpu_dest2 = gen_fp_ptr(REG(ext, 0));
gen_helper_fsincos(cpu_env, cpu_dest, cpu_dest2, cpu_src);
- tcg_temp_free_ptr(cpu_dest2);
}
break;
case 0x38: /* fcmp */
default:
goto undef;
}
- tcg_temp_free_ptr(cpu_src);
gen_helper_ftst(cpu_env, cpu_dest);
- tcg_temp_free_ptr(cpu_dest);
return;
undef:
/* FIXME: Is this right for offset addressing modes? */
c->tcond = TCG_COND_ALWAYS;
break;
}
- tcg_temp_free(fpsr);
}
static void gen_fjmpcc(DisasContext *s, int cond, TCGLabel *l1)
tcg_gen_neg_i32(tmp, tmp);
DEST_EA(env, insn, OS_BYTE, tmp, NULL);
- tcg_temp_free(tmp);
}
DISAS_INSN(ftrapcc)
/* always write IDLE */
TCGv idle = tcg_const_i32(0x41000000);
DEST_EA(env, insn, OS_LONG, idle, NULL);
- tcg_temp_free(idle);
} else {
disas_undef(env, s, insn);
}
case 4: /* Pre-decrement. */
tcg_gen_mov_i32(AREG(insn, 0), addr);
}
- tcg_temp_free(loadval);
}
}
/* Note that X and C are always cleared. */
tcg_gen_andi_i32(tmp, QREG_MACSR, CCF_N | CCF_Z | CCF_V);
gen_helper_set_ccr(cpu_env, tmp);
- tcg_temp_free(tmp);
set_cc_op(s, CC_OP_FLAGS);
}
projects / qemu.git / commitdiff