arm64: dts: qcom: sdm845: correct dynamic power coefficients
authorVincent Guittot <vincent.guittot@linaro.org>
Fri, 6 Jan 2023 16:46:18 +0000 (17:46 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 15 Mar 2023 23:38:45 +0000 (16:38 -0700)
While stressing EAS on my dragonboard RB3, I have noticed that LITTLE cores
where never selected as the most energy efficient CPU whatever the
utilization level of waking task.

energy model framework uses its cost field to estimate the energy with
the formula:

  nrg = cost of the selected OPP * utilization / CPU's max capacity

which ends up selecting the CPU with lowest cost / max capacity ration
as long as the utilization fits in the OPP's capacity.

If we compare the cost of a little OPP with similar capacity of a big OPP
like :
       OPP(kHz)   OPP capacity    cost     max capacity   cost/max capacity
LITTLE 1766400    407             351114   407            863
big    1056000    408             520267   1024           508

This can be interpreted as the LITTLE core consumes 70% more than big core
for the same compute capacity.

According to [1], LITTLE consumes 10% less than big core for Coremark
benchmark at those OPPs. If we consider that everything else stays
unchanged, the dynamic-power-coefficient of LITTLE core should be
only 53% of the current value: 290 * 53% = 154

Set the dynamic-power-coefficient of CPU0-3 to 154 to fix the energy model.

[1] https://github.com/kdrag0n/freqbench/tree/master/results/sdm845/main

Fixes: 0e0a8e35d725 ("arm64: dts: qcom: sdm845: correct dynamic power coefficients")
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106164618.1845281-1-vincent.guittot@linaro.org
arch/arm64/boot/dts/qcom/sdm845.dtsi

index 99edd2ba85e2588bf291480179e11e6ea02d988e..6c7acaab6e1319b93376e6f1d5bc7ef7913d0301 100644 (file)
@@ -95,7 +95,7 @@
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <611>;
-                       dynamic-power-coefficient = <290>;
+                       dynamic-power-coefficient = <154>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <611>;
-                       dynamic-power-coefficient = <290>;
+                       dynamic-power-coefficient = <154>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <611>;
-                       dynamic-power-coefficient = <290>;
+                       dynamic-power-coefficient = <154>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <611>;
-                       dynamic-power-coefficient = <290>;
+                       dynamic-power-coefficient = <154>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,