This option is intended to be set on platforms whose ufspr registers are
only accessible via smc call (such as gs101).
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20240426122004.2249178-3-peter.griffin@linaro.org
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
        if (ret)
                goto out;
        exynos_ufs_specify_phy_time_attr(ufs);
-       exynos_ufs_config_smu(ufs);
+       if (!(ufs->opts & EXYNOS_UFS_OPT_UFSPR_SECURE))
+               exynos_ufs_config_smu(ufs);
+
+       hba->host->dma_alignment = SZ_4K - 1;
        return 0;
 
 out:
 
 #define EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX       BIT(3)
 #define EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER    BIT(4)
 #define EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR    BIT(5)
+#define EXYNOS_UFS_OPT_UFSPR_SECURE            BIT(6)
 };
 
 #define for_each_ufs_rx_lane(ufs, i) \