dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
authorAndré Draszik <andre.draszik@linaro.org>
Thu, 1 Feb 2024 16:11:38 +0000 (16:11 +0000)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 7 Feb 2024 15:27:13 +0000 (16:27 +0100)
Add dt-schema documentation and clock IDs for the Connectivity
Peripheral 1 (PERIC1) clock management unit.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
include/dt-bindings/clock/google,gs101.h

index b1202a4f6593b1059cdccc923887ccdc53e55947..4a74d19cf48897b1b8930543be82f5ec1c397960 100644 (file)
@@ -31,6 +31,7 @@ properties:
       - google,gs101-cmu-apm
       - google,gs101-cmu-misc
       - google,gs101-cmu-peric0
+      - google,gs101-cmu-peric1
 
   clocks:
     minItems: 1
@@ -93,15 +94,17 @@ allOf:
       properties:
         compatible:
           contains:
-            const: google,gs101-cmu-peric0
+            enum:
+              - google,gs101-cmu-peric0
+              - google,gs101-cmu-peric1
 
     then:
       properties:
         clocks:
           items:
             - description: External reference clock (24.576 MHz)
-            - description: Connectivity Peripheral 0 bus clock (from CMU_TOP)
-            - description: Connectivity Peripheral 0 IP clock (from CMU_TOP)
+            - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP)
+            - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP)
 
         clock-names:
           items:
index 64e6bdc6359c39b8e716db445212301f0762c163..3dac3577788a70af3b5c80a0ea5b599559e53c59 100644 (file)
 #define CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK                78
 #define CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK             79
 
+/* CMU_PERIC1 */
+#define CLK_MOUT_PERIC1_BUS_USER                       1
+#define CLK_MOUT_PERIC1_I3C_USER                       2
+#define CLK_MOUT_PERIC1_USI0_USI_USER                  3
+#define CLK_MOUT_PERIC1_USI10_USI_USER                 4
+#define CLK_MOUT_PERIC1_USI11_USI_USER                 5
+#define CLK_MOUT_PERIC1_USI12_USI_USER                 6
+#define CLK_MOUT_PERIC1_USI13_USI_USER                 7
+#define CLK_MOUT_PERIC1_USI9_USI_USER                  8
+#define CLK_DOUT_PERIC1_I3C                            9
+#define CLK_DOUT_PERIC1_USI0_USI                       10
+#define CLK_DOUT_PERIC1_USI10_USI                      11
+#define CLK_DOUT_PERIC1_USI11_USI                      12
+#define CLK_DOUT_PERIC1_USI12_USI                      13
+#define CLK_DOUT_PERIC1_USI13_USI                      14
+#define CLK_DOUT_PERIC1_USI9_USI                       15
+#define CLK_GOUT_PERIC1_IP                             16
+#define CLK_GOUT_PERIC1_PCLK                           17
+#define CLK_GOUT_PERIC1_CLK_PERIC1_I3C_CLK             18
+#define CLK_GOUT_PERIC1_CLK_PERIC1_OSCCLK_CLK          19
+#define CLK_GOUT_PERIC1_D_TZPC_PERIC1_PCLK             20
+#define CLK_GOUT_PERIC1_GPC_PERIC1_PCLK                        21
+#define CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK               22
+#define CLK_GOUT_PERIC1_LHM_AXI_P_PERIC1_I_CLK         23
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1            24
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2            25
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3            26
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4            27
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5            28
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6            29
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_8            30
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1             31
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_15            32
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2             33
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3             34
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4             35
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5             36
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6             37
+#define CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_8             38
+#define CLK_GOUT_PERIC1_CLK_PERIC1_BUSP_CLK            39
+#define CLK_GOUT_PERIC1_CLK_PERIC1_USI0_USI_CLK                40
+#define CLK_GOUT_PERIC1_CLK_PERIC1_USI10_USI_CLK       41
+#define CLK_GOUT_PERIC1_CLK_PERIC1_USI11_USI_CLK       42
+#define CLK_GOUT_PERIC1_CLK_PERIC1_USI12_USI_CLK       43
+#define CLK_GOUT_PERIC1_CLK_PERIC1_USI13_USI_CLK       44
+#define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK                45
+#define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK             46
+
 #endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */