hw/gpio/pl061: Document the interface of this device
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 2 Jul 2021 10:40:12 +0000 (11:40 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 9 Jul 2021 15:09:12 +0000 (16:09 +0100)
Add a comment documenting the "QEMU interface" of this device:
which MMIO regions, IRQ lines, GPIO lines, etc it exposes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
hw/gpio/pl061.c

index 42f6e6c4891da66d46778240fd166d8ed09e1142..a3c13862212f5a6d934f4c356b641653e1a0d634 100644 (file)
@@ -6,6 +6,13 @@
  * Written by Paul Brook
  *
  * This code is licensed under the GPL.
+ *
+ * QEMU interface:
+ *  + sysbus MMIO region 0: the device registers
+ *  + sysbus IRQ: the GPIOINTR interrupt line
+ *  + unnamed GPIO inputs 0..7: inputs to connect to the emulated GPIO lines
+ *  + unnamed GPIO outputs 0..7: the emulated GPIO lines, considered as
+ *    outputs
  */
 
 #include "qemu/osdep.h"