drm/amd/display: Changed pipe split policy to allow for multi-display pipe split
authorAngus Wang <angus.wang@amd.com>
Thu, 9 Dec 2021 22:27:01 +0000 (17:27 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Dec 2021 13:54:44 +0000 (08:54 -0500)
[WHY]
Current implementation of pipe split policy prevents pipe split with
multiple displays connected, which caused the MCLK speed to be stuck at
max

[HOW]
Changed the pipe split policies so that pipe split is allowed for
multi-display configurations

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1522
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1709
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1655
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Angus Wang <angus.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

index 2a72517e2b28173eb1edf713291db469579afcd9..2bc93df023ad26d54ac9e211ff749a1e2a5a3eec 100644 (file)
@@ -1069,7 +1069,7 @@ static const struct dc_debug_options debug_defaults_drv = {
                .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
-               .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
+               .pipe_split_policy = MPC_SPLIT_DYNAMIC,
                .force_single_disp_pipe_split = false,
                .disable_dcc = DCC_ENABLE,
                .vsr_support = true,
index d6acf9a8590a6cdd3452be96740510ddbf5dc0d2..0bb7d3dd53fa40f9632447e61a14f215ac18472e 100644 (file)
@@ -603,7 +603,7 @@ static const struct dc_debug_options debug_defaults_drv = {
                .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
-               .pipe_split_policy = MPC_SPLIT_AVOID,
+               .pipe_split_policy = MPC_SPLIT_DYNAMIC,
                .force_single_disp_pipe_split = false,
                .disable_dcc = DCC_ENABLE,
                .vsr_support = true,
index ca1bbc942fd40cec45a7288367f5821fa65c4185..e5cc6bf45743acbe08ab33c77e7ca535a58e332e 100644 (file)
@@ -873,7 +873,7 @@ static const struct dc_debug_options debug_defaults_drv = {
                .clock_trace = true,
                .disable_pplib_clock_request = true,
                .min_disp_clk_khz = 100000,
-               .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
+               .pipe_split_policy = MPC_SPLIT_DYNAMIC,
                .force_single_disp_pipe_split = false,
                .disable_dcc = DCC_ENABLE,
                .vsr_support = true,
index 369ceeeddc7e292e8ed271c00393e8cdc502be87..e12660c609ee480749f9f7041d0ec4ec874786b9 100644 (file)
@@ -840,7 +840,7 @@ static const struct dc_debug_options debug_defaults_drv = {
        .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = true,
-       .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
+       .pipe_split_policy = MPC_SPLIT_DYNAMIC,
        .force_single_disp_pipe_split = false,
        .disable_dcc = DCC_ENABLE,
        .vsr_support = true,
index b4001233867c3528cef9c0c81cd9fb9bfe75fa6a..c1c6e602b06cfbe4c818f4227fbeaacfb09c57d9 100644 (file)
@@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = {
        .disable_clock_gate = true,
        .disable_pplib_clock_request = true,
        .disable_pplib_wm_range = true,
-       .pipe_split_policy = MPC_SPLIT_AVOID,
+       .pipe_split_policy = MPC_SPLIT_DYNAMIC,
        .force_single_disp_pipe_split = false,
        .disable_dcc = DCC_ENABLE,
        .vsr_support = true,
index 003e9536867236c2b57820ba8547dd0a306cabb1..2e9cbfa7663b8daa2524558b16fa114b8ad33aa0 100644 (file)
@@ -211,7 +211,7 @@ static const struct dc_debug_options debug_defaults_drv = {
                .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
-               .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
+               .pipe_split_policy = MPC_SPLIT_DYNAMIC,
                .force_single_disp_pipe_split = false,
                .disable_dcc = DCC_ENABLE,
                .vsr_support = true,
index 01ba9d656c7294c58220bc3a11505236618f5897..2de687f64cf6a874a36bbc24dd12484aca36e526 100644 (file)
@@ -193,7 +193,7 @@ static const struct dc_debug_options debug_defaults_drv = {
                .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
-               .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
+               .pipe_split_policy = MPC_SPLIT_DYNAMIC,
                .force_single_disp_pipe_split = false,
                .disable_dcc = DCC_ENABLE,
                .vsr_support = true,
index 6d7ed7166bfb0338386766788421c503605c4399..ba4c33500a6d2f20fae61cb5578fd93690445df0 100644 (file)
@@ -1003,7 +1003,7 @@ static const struct dc_debug_options debug_defaults_drv = {
        .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
-       .pipe_split_policy = MPC_SPLIT_AVOID,
+       .pipe_split_policy = MPC_SPLIT_DYNAMIC,
        .force_single_disp_pipe_split = false,
        .disable_dcc = DCC_ENABLE,
        .vsr_support = true,