drm/nouveau: move more missing UAPI bits

Those are already de-facto UAPI, so let's just move it into the uapi
header.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Danilo Krummrich <dakr@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240305133853.2214268-2-kherbst@redhat.com

diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c
index cd14f993bdd1bdad352a70eba9acc473ceab7bdb..92f9127b284ac3623e3bee6d0506898681c60ff7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
@@ -312,11 +312,21 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
        if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
                if (init->fb_ctxdma_handle == ~0) {
                        switch (init->tt_ctxdma_handle) {
-                       case 0x01: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_GR    ; break;
-                       case 0x02: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC; break;
-                       case 0x04: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP ; break;
-                       case 0x08: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD ; break;
-                       case 0x30: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_CE    ; break;
+                       case NOUVEAU_FIFO_ENGINE_GR:
+                               engine = NV_DEVICE_HOST_RUNLIST_ENGINES_GR;
+                               break;
+                       case NOUVEAU_FIFO_ENGINE_VP:
+                               engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC;
+                               break;
+                       case NOUVEAU_FIFO_ENGINE_PPP:
+                               engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP;
+                               break;
+                       case NOUVEAU_FIFO_ENGINE_BSP:
+                               engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD;
+                               break;
+                       case NOUVEAU_FIFO_ENGINE_CE:
+                               engine = NV_DEVICE_HOST_RUNLIST_ENGINES_CE;
+                               break;
                        default:
                                return nouveau_abi16_put(abi16, -ENOSYS);
                        }

diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.h b/drivers/gpu/drm/nouveau/nouveau_abi16.h
index 11c8c4a80079bbb2b658816dd42d05f68a5eaab6..661b901d8ecc92954e6f5206022a1e5b3c88fc38 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.h
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.h
@@ -50,18 +50,6 @@ struct drm_nouveau_grobj_alloc {
        int      class;
 };
 
-struct drm_nouveau_notifierobj_alloc {
-       uint32_t channel;
-       uint32_t handle;
-       uint32_t size;
-       uint32_t offset;
-};
-
-struct drm_nouveau_gpuobj_free {
-       int      channel;
-       uint32_t handle;
-};
-
 struct drm_nouveau_setparam {
        uint64_t param;
        uint64_t value;

diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h
index cd84227f1b42ff53e21427de90d0dee1b4ffebbd..8ad8d1cd1566856078a8277ced938a05cf5a25b0 100644 (file)
--- a/include/uapi/drm/nouveau_drm.h
+++ b/include/uapi/drm/nouveau_drm.h
@@ -73,6 +73,16 @@ struct drm_nouveau_getparam {
        __u64 value;
 };
 
+/*
+ * Those are used to support selecting the main engine used on Kepler.
+ * This goes into drm_nouveau_channel_alloc::tt_ctxdma_handle
+ */
+#define NOUVEAU_FIFO_ENGINE_GR  0x01
+#define NOUVEAU_FIFO_ENGINE_VP  0x02
+#define NOUVEAU_FIFO_ENGINE_PPP 0x04
+#define NOUVEAU_FIFO_ENGINE_BSP 0x08
+#define NOUVEAU_FIFO_ENGINE_CE  0x30
+
 struct drm_nouveau_channel_alloc {
        __u32     fb_ctxdma_handle;
        __u32     tt_ctxdma_handle;
@@ -95,6 +105,18 @@ struct drm_nouveau_channel_free {
        __s32 channel;
 };
 
+struct drm_nouveau_notifierobj_alloc {
+       __u32 channel;
+       __u32 handle;
+       __u32 size;
+       __u32 offset;
+};
+
+struct drm_nouveau_gpuobj_free {
+       __s32 channel;
+       __u32 handle;
+};
+
 #define NOUVEAU_GEM_DOMAIN_CPU       (1 << 0)
 #define NOUVEAU_GEM_DOMAIN_VRAM      (1 << 1)
 #define NOUVEAU_GEM_DOMAIN_GART      (1 << 2)