dt-bindings: iio: adc: update the doc for SAR ADC
authorXingyu Chen <xingyu.chen@amlogic.com>
Tue, 7 Nov 2017 14:10:20 +0000 (22:10 +0800)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Sat, 2 Dec 2017 11:37:36 +0000 (11:37 +0000)
Update the doc as the SAR ADC modules doesn't require "sana" clock.

Singed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt

index f413e82c8b837516ec5c72196fc19e43839dfd02..1e6ee3deb4fa214bfca84403d4da1c05df4f1121 100644 (file)
@@ -15,7 +15,6 @@ Required properties:
                        - "clkin" for the reference clock (typically XTAL)
                        - "core" for the SAR ADC core clock
                optional clocks:
-                       - "sana" for the analog clock
                        - "adc_clk" for the ADC (sampling) clock
                        - "adc_sel" for the ADC (sampling) clock mux
 - vref-supply: the regulator supply for the ADC reference voltage