MAINTAINERS: Add entry for Renesas RISC-V
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Fri, 28 Oct 2022 16:59:20 +0000 (17:59 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Nov 2022 15:36:34 +0000 (16:36 +0100)
Add RISC-V architecture as part of ARM/Renesas architecture, as they have
the same maintainers, use the same development collaboration
infrastructure, and share many files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20221028165921.94487-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
MAINTAINERS

index cf0f1850237247013eacce7f737d35793e69024b..7290f18d479c3370faae4798d4a254044633c7fe 100644 (file)
@@ -2691,7 +2691,7 @@ F:        arch/arm/boot/dts/rtd*
 F:     arch/arm/mach-realtek/
 F:     arch/arm64/boot/dts/realtek/
 
-ARM/RENESAS ARCHITECTURE
+ARM/RISC-V/RENESAS ARCHITECTURE
 M:     Geert Uytterhoeven <geert+renesas@glider.be>
 M:     Magnus Damm <magnus.damm@gmail.com>
 L:     linux-renesas-soc@vger.kernel.org
@@ -2713,6 +2713,7 @@ F:        arch/arm/configs/shmobile_defconfig
 F:     arch/arm/include/debug/renesas-scif.S
 F:     arch/arm/mach-shmobile/
 F:     arch/arm64/boot/dts/renesas/
+F:     arch/riscv/boot/dts/renesas/
 F:     drivers/soc/renesas/
 F:     include/linux/soc/renesas/