drm/amdgpu: correct reference clock value on navi10

remove the divisor 4

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index ae3a407b16a3a19626e1f527c97f3733a242b3ed..a3692dba64fffeb980ea71ccb111d3faf4993f49 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -122,7 +122,7 @@ static u32 nv_get_config_memsize(struct amdgpu_device *adev)
 
 static u32 nv_get_xclk(struct amdgpu_device *adev)
 {
-       return adev->clock.spll.reference_freq / 4;
+       return adev->clock.spll.reference_freq;
 }