target-i386: Ensure always-1 bits on DR6 can't be cleared

Bits 4-11 and 16-31 on DR6 are documented as always 1, so ensure they
can't be cleared by software.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c
index 144cfd43fc96c237c4250d431a3fa9ca9f612cd3..dac1b1a360002813e283731e232449686f82715f 100644 (file)
--- a/target-i386/bpt_helper.c
+++ b/target-i386/bpt_helper.c
@@ -262,7 +262,7 @@ void helper_set_dr(CPUX86State *env, int reg, target_ulong t0)
         }
         /* fallthru */
     case 6:
-        env->dr[6] = t0;
+        env->dr[6] = t0 | DR6_FIXED_1;
         return;
     case 5:
         if (env->cr[4] & CR4_DE_MASK) {