riscv: dts: canaan: fix the k210's memory node
authorConor Dooley <conor.dooley@microchip.com>
Tue, 5 Jul 2022 21:52:06 +0000 (22:52 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 14 Jul 2022 21:57:41 +0000 (14:57 -0700)
The k210 U-Boot port has been using the clocks defined in the
devicetree to bring up the board's SRAM, but this violates the
dt-schema. As such, move the clocks to a dedicated node with
the same compatible string. The regs property does not fit in
either node, so is replaced by comments.

Tested-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220705215213.1802496-6-mail@conchuod.ie
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/boot/dts/canaan/k210.dtsi

index 44d33851476125cb7721dea068558abd1b872981..cd4eae82d8b2e6bac20a17e81e192c1aa2d3c2d7 100644 (file)
 
        sram: memory@80000000 {
                device_type = "memory";
+               reg = <0x80000000 0x400000>, /* sram0 4 MiB */
+                     <0x80400000 0x200000>, /* sram1 2 MiB */
+                     <0x80600000 0x200000>; /* aisram 2 MiB */
+       };
+
+       sram_controller: memory-controller {
                compatible = "canaan,k210-sram";
-               reg = <0x80000000 0x400000>,
-                     <0x80400000 0x200000>,
-                     <0x80600000 0x200000>;
-               reg-names = "sram0", "sram1", "aisram";
                clocks = <&sysclk K210_CLK_SRAM0>,
                         <&sysclk K210_CLK_SRAM1>,
                         <&sysclk K210_CLK_AI>;