coresight: etm4x: Safe access for TRCQCLTR

ETM4x implements TRCQCLTR only when the Q elements are supported
and the Q element filtering is supported (TRCIDR0.QFILT). Access
to the register otherwise could be fatal. Fix this by tracking the
availability, like the others.

Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
Reported-by: Yabin Cui <yabinc@google.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Yabin Cui <yabinc@google.com>
Link: https://lore.kernel.org/r/20240412142702.2882478-4-suzuki.poulose@arm.com

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index a9765d45a0ee853c8eec655e6108f274962bedb1..8643b77e50f4133991eb4f013a9a37b8d0614f41 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -1240,6 +1240,8 @@ static void etm4_init_arch_data(void *info)
        drvdata->nr_event = FIELD_GET(TRCIDR0_NUMEVENT_MASK, etmidr0);
        /* QSUPP, bits[16:15] Q element support field */
        drvdata->q_support = FIELD_GET(TRCIDR0_QSUPP_MASK, etmidr0);
+       if (drvdata->q_support)
+               drvdata->q_filt = !!(etmidr0 & TRCIDR0_QFILT);
        /* TSSIZE, bits[28:24] Global timestamp size field */
        drvdata->ts_size = FIELD_GET(TRCIDR0_TSSIZE_MASK, etmidr0);
 
@@ -1732,7 +1734,8 @@ static int __etm4_cpu_save(struct etmv4_drvdata *drvdata)
        state->trcccctlr = etm4x_read32(csa, TRCCCCTLR);
        state->trcbbctlr = etm4x_read32(csa, TRCBBCTLR);
        state->trctraceidr = etm4x_read32(csa, TRCTRACEIDR);
-       state->trcqctlr = etm4x_read32(csa, TRCQCTLR);
+       if (drvdata->q_filt)
+               state->trcqctlr = etm4x_read32(csa, TRCQCTLR);
 
        state->trcvictlr = etm4x_read32(csa, TRCVICTLR);
        state->trcviiectlr = etm4x_read32(csa, TRCVIIECTLR);
@@ -1862,7 +1865,8 @@ static void __etm4_cpu_restore(struct etmv4_drvdata *drvdata)
        etm4x_relaxed_write32(csa, state->trcccctlr, TRCCCCTLR);
        etm4x_relaxed_write32(csa, state->trcbbctlr, TRCBBCTLR);
        etm4x_relaxed_write32(csa, state->trctraceidr, TRCTRACEIDR);
-       etm4x_relaxed_write32(csa, state->trcqctlr, TRCQCTLR);
+       if (drvdata->q_filt)
+               etm4x_relaxed_write32(csa, state->trcqctlr, TRCQCTLR);
 
        etm4x_relaxed_write32(csa, state->trcvictlr, TRCVICTLR);
        etm4x_relaxed_write32(csa, state->trcviiectlr, TRCVIIECTLR);

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
index 9e430f72bbd6fed8f6d2664d6ade0960d09857ef..9e9165f62e81fe5a87d35b4e30bc23f93cb211ec 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x.h
+++ b/drivers/hwtracing/coresight/coresight-etm4x.h
@@ -135,6 +135,7 @@
 #define TRCIDR0_TRCCCI                         BIT(7)
 #define TRCIDR0_RETSTACK                       BIT(9)
 #define TRCIDR0_NUMEVENT_MASK                  GENMASK(11, 10)
+#define TRCIDR0_QFILT                          BIT(14)
 #define TRCIDR0_QSUPP_MASK                     GENMASK(16, 15)
 #define TRCIDR0_TSSIZE_MASK                    GENMASK(28, 24)
 
@@ -954,6 +955,7 @@ struct etmv4_save_state {
  * @os_unlock:  True if access to management registers is allowed.
  * @instrp0:   Tracing of load and store instructions
  *             as P0 elements is supported.
+ * @q_filt:    Q element filtering support, if Q elements are supported.
  * @trcbb:     Indicates if the trace unit supports branch broadcast tracing.
  * @trccond:   If the trace unit supports conditional
  *             instruction tracing.
@@ -1016,6 +1018,7 @@ struct etmv4_drvdata {
        bool                            boot_enable;
        bool                            os_unlock;
        bool                            instrp0;
+       bool                            q_filt;
        bool                            trcbb;
        bool                            trccond;
        bool                            retstack;