arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level
authorAndrew Davis <afd@ti.com>
Thu, 10 Aug 2023 00:38:05 +0000 (19:38 -0500)
committerNishanth Menon <nm@ti.com>
Thu, 10 Aug 2023 03:30:17 +0000 (22:30 -0500)
OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-5-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
arch/arm64/boot/dts/ti/k3-am654-base-board.dts

index e26bd988e5224e8ca7c157c851c0951f3e0ffcc5..6041862d5aa756f31c89e78e1bc5d8b49f959911 100644 (file)
 };
 
 &ospi0 {
+       status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 
index 1c16c3cac612b594c357634893ab7d388171e0b2..616230ecfc33df0f29677068d76477b8f09c6995 100644 (file)
                        power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       status = "disabled";
                };
 
                ospi1: spi@47050000 {
                        power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       status = "disabled";
                };
        };
 
index 734b051c97000dfdf1954de3c6534ea2ec46c621..aac243bacfeea30fa7e31d457b3bb8faf97dd619 100644 (file)
 };
 
 &ospi0 {
+       status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;