irqchip/renesas-rzg2l: Simplify rzg2l_irqc_irq_{en,dis}able()
authorBiju Das <biju.das.jz@bp.renesas.com>
Mon, 18 Mar 2024 08:50:41 +0000 (08:50 +0000)
committerThomas Gleixner <tglx@linutronix.de>
Mon, 25 Mar 2024 16:38:28 +0000 (17:38 +0100)
Simplify rzg2l_irqc_irq_{en,dis}able() by moving common code to
rzg2l_tint_irq_endisable().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
drivers/irqchip/irq-renesas-rzg2l.c

index ae67fec2ab468ff61daf3ca46679e3239289ed83..f6484bf15e0b8fdac6e574cad332452b0b9a82c1 100644 (file)
@@ -138,7 +138,7 @@ static void rzg2l_irqc_eoi(struct irq_data *d)
        irq_chip_eoi_parent(d);
 }
 
-static void rzg2l_irqc_irq_disable(struct irq_data *d)
+static void rzg2l_tint_irq_endisable(struct irq_data *d, bool enable)
 {
        unsigned int hw_irq = irqd_to_hwirq(d);
 
@@ -151,30 +151,24 @@ static void rzg2l_irqc_irq_disable(struct irq_data *d)
 
                raw_spin_lock(&priv->lock);
                reg = readl_relaxed(priv->base + TSSR(tssr_index));
-               reg &= ~(TIEN << TSSEL_SHIFT(tssr_offset));
+               if (enable)
+                       reg |= TIEN << TSSEL_SHIFT(tssr_offset);
+               else
+                       reg &= ~(TIEN << TSSEL_SHIFT(tssr_offset));
                writel_relaxed(reg, priv->base + TSSR(tssr_index));
                raw_spin_unlock(&priv->lock);
        }
+}
+
+static void rzg2l_irqc_irq_disable(struct irq_data *d)
+{
+       rzg2l_tint_irq_endisable(d, false);
        irq_chip_disable_parent(d);
 }
 
 static void rzg2l_irqc_irq_enable(struct irq_data *d)
 {
-       unsigned int hw_irq = irqd_to_hwirq(d);
-
-       if (hw_irq >= IRQC_TINT_START && hw_irq < IRQC_NUM_IRQ) {
-               struct rzg2l_irqc_priv *priv = irq_data_to_priv(d);
-               u32 offset = hw_irq - IRQC_TINT_START;
-               u32 tssr_offset = TSSR_OFFSET(offset);
-               u8 tssr_index = TSSR_INDEX(offset);
-               u32 reg;
-
-               raw_spin_lock(&priv->lock);
-               reg = readl_relaxed(priv->base + TSSR(tssr_index));
-               reg |= TIEN << TSSEL_SHIFT(tssr_offset);
-               writel_relaxed(reg, priv->base + TSSR(tssr_index));
-               raw_spin_unlock(&priv->lock);
-       }
+       rzg2l_tint_irq_endisable(d, true);
        irq_chip_enable_parent(d);
 }