static struct clk dpll2_ck = {
        .name           = "dpll2_ck",
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap3_clkops_noncore_dpll_ops,
        .parent         = &sys_ck,
        .dpll_data      = &dpll2_dd,
        .round_rate     = &omap2_dpll_round_rate,
 
 static struct clk dpll4_ck = {
        .name           = "dpll4_ck",
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap3_clkops_noncore_dpll_ops,
        .parent         = &sys_ck,
        .dpll_data      = &dpll4_dd,
        .round_rate     = &omap2_dpll_round_rate,
 
 static struct clk dpll5_ck = {
        .name           = "dpll5_ck",
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap3_clkops_noncore_dpll_ops,
        .parent         = &sys_ck,
        .dpll_data      = &dpll5_dd,
        .round_rate     = &omap2_dpll_round_rate,
 
        .parent         = &abe_dpll_refclk_mux_ck,
        .dpll_data      = &dpll_abe_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_iva_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_mpu_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_per_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_unipro_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_usb_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,