arm64: dts: qcom: sdm845-audio-wcd9340: commonize clocks
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 23 Jan 2023 08:43:00 +0000 (09:43 +0100)
committerBjorn Andersson <andersson@kernel.org>
Thu, 9 Feb 2023 00:02:10 +0000 (16:02 -0800)
Clock for WCD9340 is coming from the SoC and is the same in all users,
so move it to common file to reduce the code duplication (which still
allows further customizations per board).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230123084300.22353-6-krzysztof.kozlowski@linaro.org
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi
arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts

index 4f48c30201563b348ab56c0a26fc740c6e57b285..692d6dd298b436a1717e4d03980cbc77ae57d595 100644 (file)
 };
 
 &wcd9340 {
-       clock-names = "extclk";
-       clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
        vdd-buck-supply = <&vreg_s4a_1p8>;
        vdd-buck-sido-supply = <&vreg_s4a_1p8>;
index 33718cb95c838dca45fe442105da2decd98d8ecb..0d7c37f3917662942ca437be83a1725c349ddf9c 100644 (file)
@@ -29,6 +29,9 @@
                        interrupt-controller;
                        #interrupt-cells = <1>;
 
+                       clock-names = "extclk";
+                       clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
+
                        #clock-cells = <0>;
                        clock-frequency = <9600000>;
                        clock-output-names = "mclk";
index 321dd43d7aa4e2f893cfa91f2299b74905c8767f..0ef885d5dd93274c2a4fead909e17cc2e1073399 100644 (file)
 };
 
 &wcd9340 {
-       clock-names = "extclk";
-       clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
        vdd-buck-supply = <&vreg_s4a_1p8>;
        vdd-buck-sido-supply = <&vreg_s4a_1p8>;
index 3450dcc29cd1ee0a72af07e7e9d5c29a529903bf..4f123f74cf573e5aacee6015c561ea4a32bd16b0 100644 (file)
 };
 
 &wcd9340 {
-       clock-names = "extclk";
-       clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
        vdd-buck-sido-supply = <&vreg_s4a_1p8>;
        vdd-buck-supply = <&vreg_s4a_1p8>;
index bb8368e49d72ecc65a2c5340d7a99db9c3fa2633..57e94e11c47175e30048e0559e16f1d21bc9bd85 100644 (file)
 };
 
 &wcd9340 {
-       clock-names = "extclk";
-       clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
        vdd-buck-supply = <&vreg_s4a_1p8>;
        vdd-buck-sido-supply = <&vreg_s4a_1p8>;
index b414607d20c6e245e3ffb48ccdc60dfad6198f86..3059ab2fe76d6746d2121ac5f732820523105c2f 100644 (file)
 };
 
 &wcd9340 {
-       clock-names = "extclk";
-       clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
        vdd-buck-supply = <&vreg_s4a_1p8>;
        vdd-buck-sido-supply = <&vreg_s4a_1p8>;