arm64: dts: qcom: Enable RPMh Sleep stats
authorMaulik Shah <mkshah@codeaurora.org>
Wed, 13 Oct 2021 06:38:23 +0000 (12:08 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Sat, 16 Oct 2021 23:23:54 +0000 (18:23 -0500)
Add device node for Sleep stats driver which provides various
low power mode stats on sc7180, sc7280, sm8150, sm8250 and sm8350.

Also update the reg size of aoss_qmp device to 0x400.

Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634107104-22197-5-git-send-email-mkshah@codeaurora.org
arch/arm64/boot/dts/qcom/sc7180.dtsi
arch/arm64/boot/dts/qcom/sc7280.dtsi
arch/arm64/boot/dts/qcom/sm8150.dtsi
arch/arm64/boot/dts/qcom/sm8250.dtsi
arch/arm64/boot/dts/qcom/sm8350.dtsi

index 8531f994e1a845815c6653932e8c6a83c1063cb7..faf8b807d0ff836bed65870683126ed1b45cee70 100644 (file)
 
                aoss_qmp: power-controller@c300000 {
                        compatible = "qcom,sc7180-aoss-qmp";
-                       reg = <0 0x0c300000 0 0x100000>;
+                       reg = <0 0x0c300000 0 0x400>;
                        interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
                        mboxes = <&apss_shared 0>;
 
                        #clock-cells = <0>;
                };
 
+               sram@c3f0000 {
+                       compatible = "qcom,rpmh-stats";
+                       reg = <0 0x0c3f0000 0 0x400>;
+               };
+
                spmi_bus: spmi@c440000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0 0x0c440000 0 0x1100>,
index 24956570eb8e3372d736ca1e5a62016d542575d6..2a578dfc8cc594bcd57f632e441bf6469b460d69 100644 (file)
 
                aoss_qmp: power-controller@c300000 {
                        compatible = "qcom,sc7280-aoss-qmp";
-                       reg = <0 0x0c300000 0 0x100000>;
+                       reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP
                                                     IPCC_MPROC_SIGNAL_GLINK_QMP
                                                     IRQ_TYPE_EDGE_RISING>;
                        #clock-cells = <0>;
                };
 
+               sram@c3f0000 {
+                       compatible = "qcom,rpmh-stats";
+                       reg = <0 0x0c3f0000 0 0x400>;
+               };
+
                spmi_bus: spmi@c440000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0 0x0c440000 0 0x1100>,
index 8a035693b7a332de1d4ccb8870146e90fbe8c8d4..123d6412ac2f9cc60817e20ea9fadeff3da196e4 100644 (file)
 
                aoss_qmp: power-controller@c300000 {
                        compatible = "qcom,sm8150-aoss-qmp";
-                       reg = <0x0 0x0c300000 0x0 0x100000>;
+                       reg = <0x0 0x0c300000 0x0 0x400>;
                        interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
                        mboxes = <&apss_shared 0>;
 
                        #clock-cells = <0>;
                };
 
+               sram@c3f0000 {
+                       compatible = "qcom,rpmh-stats";
+                       reg = <0 0x0c3f0000 0 0x400>;
+               };
+
                tsens0: thermal-sensor@c263000 {
                        compatible = "qcom,sm8150-tsens", "qcom,tsens-v2";
                        reg = <0 0x0c263000 0 0x1ff>, /* TM */
index 86a4f80bf5451bb0f442a9449e1db631d6d36b9b..be9d8efed5afc23550c264574570bd5e9e430912 100644 (file)
 
                aoss_qmp: power-controller@c300000 {
                        compatible = "qcom,sm8250-aoss-qmp";
-                       reg = <0 0x0c300000 0 0x100000>;
+                       reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP
                                                     IPCC_MPROC_SIGNAL_GLINK_QMP
                                                     IRQ_TYPE_EDGE_RISING>;
                        #clock-cells = <0>;
                };
 
+               sram@c3f0000 {
+                       compatible = "qcom,rpmh-stats";
+                       reg = <0 0x0c3f0000 0 0x400>;
+               };
+
                spmi_bus: spmi@c440000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0x0 0x0c440000 0x0 0x0001100>,
index 6c83cd52a279bae624f777cfdc7ad6016769785e..90a0e1959dbba1ed60cc11f40df40fe0acd4eae9 100644 (file)
 
                aoss_qmp: power-controller@c300000 {
                        compatible = "qcom,sm8350-aoss-qmp";
-                       reg = <0 0x0c300000 0 0x100000>;
+                       reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
                                                     IRQ_TYPE_EDGE_RISING>;
                        mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
                        #clock-cells = <0>;
                };
 
+               sram@c3f0000 {
+                       compatible = "qcom,rpmh-stats";
+                       reg = <0 0x0c3f0000 0 0x400>;
+               };
+
                spmi_bus: spmi@c440000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0x0 0xc440000 0x0 0x1100>,