i2c: mediatek: fixing the incorrect register offset

[ Upstream commit b8228aea5a19d5111a7bf44f7de6749d1f5d487a ]

The reason for the modification here is that the previous
offset information is incorrect, OFFSET_DEBUGSTAT = 0xE4 is
the correct value.

Fixes: 25708278f810 ("i2c: mediatek: Add i2c support for MediaTek MT8183")
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Qii Wang <qii.wang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 7d4b3eb7077ad62e13db6ca2eda1b60521723232..72acda59eb3997481d8aa93e7535e408cd305c70 100644 (file)
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -195,7 +195,7 @@ static const u16 mt_i2c_regs_v2[] = {
        [OFFSET_CLOCK_DIV] = 0x48,
        [OFFSET_SOFTRESET] = 0x50,
        [OFFSET_SCL_MIS_COMP_POINT] = 0x90,
-       [OFFSET_DEBUGSTAT] = 0xe0,
+       [OFFSET_DEBUGSTAT] = 0xe4,
        [OFFSET_DEBUGCTRL] = 0xe8,
        [OFFSET_FIFO_STAT] = 0xf4,
        [OFFSET_FIFO_THRESH] = 0xf8,