arm64: dts: imx8mp: update ecspi compatible and clk

i.MX8MP ECSPI is derived from i.MX6UL, so update compatible
Add assigned-clocks settings

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9f1b043c2f3fb27eab09dabf93ae25981a8335dd..7be02cd100cfc3feab134aa1fcde38225fc1b10e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -705,12 +705,15 @@
                        ecspi1: spi@30820000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx8mp-ecspi", "fsl,imx51-ecspi";
+                               compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi";
                                reg = <0x30820000 0x10000>;
                                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_ECSPI1_ROOT>,
                                         <&clk IMX8MP_CLK_ECSPI1_ROOT>;
                                clock-names = "ipg", "per";
+                               assigned-clock-rates = <80000000>;
+                               assigned-clocks = <&clk IMX8MP_CLK_ECSPI1>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
                                dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
                                dma-names = "rx", "tx";
                                status = "disabled";
@@ -719,12 +722,15 @@
                        ecspi2: spi@30830000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx8mp-ecspi", "fsl,imx51-ecspi";
+                               compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi";
                                reg = <0x30830000 0x10000>;
                                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_ECSPI2_ROOT>,
                                         <&clk IMX8MP_CLK_ECSPI2_ROOT>;
                                clock-names = "ipg", "per";
+                               assigned-clock-rates = <80000000>;
+                               assigned-clocks = <&clk IMX8MP_CLK_ECSPI2>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
                                dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
                                dma-names = "rx", "tx";
                                status = "disabled";
@@ -733,12 +739,15 @@
                        ecspi3: spi@30840000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx8mp-ecspi", "fsl,imx51-ecspi";
+                               compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi";
                                reg = <0x30840000 0x10000>;
                                interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_ECSPI3_ROOT>,
                                         <&clk IMX8MP_CLK_ECSPI3_ROOT>;
                                clock-names = "ipg", "per";
+                               assigned-clock-rates = <80000000>;
+                               assigned-clocks = <&clk IMX8MP_CLK_ECSPI3>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
                                dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
                                dma-names = "rx", "tx";
                                status = "disabled";