perf: arm_spe: Support new SPEv1.2/v8.7 'not taken' event

Arm SPEv1.2 (Armv8.7/v9.2) adds a new event, 'not taken', in bit 6 of
the PMSEVFR_EL1 register. Update arm_spe_pmsevfr_res0() to support the
additional event.

Tested-by: James Clark <james.clark@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v4-6-327f860daf28@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index db269eda7c1c2f20f6ca5753a689b3b9e8adc52b..fc878772779229d5a81048b894d6e3cc0d3cf536 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -221,6 +221,8 @@
         BIT_ULL(6) | BIT_ULL(4) | BIT_ULL(2) | BIT_ULL(0))
 #define PMSEVFR_EL1_RES0_V1P1  \
        (PMSEVFR_EL1_RES0_IMP & ~(BIT_ULL(18) | BIT_ULL(17) | BIT_ULL(11)))
+#define PMSEVFR_EL1_RES0_V1P2  \
+       (PMSEVFR_EL1_RES0_V1P1 & ~BIT_ULL(6))
 
 /* Buffer error reporting */
 #define PMBSR_EL1_FAULT_FSC_SHIFT      PMBSR_EL1_MSS_SHIFT

diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
index af6d3867c3e708a73e7451a7786cf84f9847163c..82f67e941bc413bf03a27fa13694c18c338c05f4 100644 (file)
--- a/drivers/perf/arm_spe_pmu.c
+++ b/drivers/perf/arm_spe_pmu.c
@@ -677,9 +677,11 @@ static u64 arm_spe_pmsevfr_res0(u16 pmsver)
        case ID_AA64DFR0_EL1_PMSVer_IMP:
                return PMSEVFR_EL1_RES0_IMP;
        case ID_AA64DFR0_EL1_PMSVer_V1P1:
+               return PMSEVFR_EL1_RES0_V1P1;
+       case ID_AA64DFR0_EL1_PMSVer_V1P2:
        /* Return the highest version we support in default */
        default:
-               return PMSEVFR_EL1_RES0_V1P1;
+               return PMSEVFR_EL1_RES0_V1P2;
        }
 }