qspi->io_base = devm_ioremap_resource(dev, res);
        if (IS_ERR(qspi->io_base)) {
                ret = PTR_ERR(qspi->io_base);
-               goto err;
+               goto err_master_put;
        }
 
        qspi->phys_base = res->start;
        qspi->mm_base = devm_ioremap_resource(dev, res);
        if (IS_ERR(qspi->mm_base)) {
                ret = PTR_ERR(qspi->mm_base);
-               goto err;
+               goto err_master_put;
        }
 
        qspi->mm_size = resource_size(res);
        if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ) {
                ret = -EINVAL;
-               goto err;
+               goto err_master_put;
        }
 
        irq = platform_get_irq(pdev, 0);
-       if (irq < 0)
-               return irq;
+       if (irq < 0) {
+               ret = irq;
+               goto err_master_put;
+       }
 
        ret = devm_request_irq(dev, irq, stm32_qspi_irq, 0,
                               dev_name(dev), qspi);
        if (ret) {
                dev_err(dev, "failed to request irq\n");
-               goto err;
+               goto err_master_put;
        }
 
        init_completion(&qspi->data_completion);
        qspi->clk = devm_clk_get(dev, NULL);
        if (IS_ERR(qspi->clk)) {
                ret = PTR_ERR(qspi->clk);
-               goto err;
+               goto err_master_put;
        }
 
        qspi->clk_rate = clk_get_rate(qspi->clk);
        if (!qspi->clk_rate) {
                ret = -EINVAL;
-               goto err;
+               goto err_master_put;
        }
 
        ret = clk_prepare_enable(qspi->clk);
        if (ret) {
                dev_err(dev, "can not enable the clock\n");
-               goto err;
+               goto err_master_put;
        }
 
        rstc = devm_reset_control_get_exclusive(dev, NULL);
        if (IS_ERR(rstc)) {
                ret = PTR_ERR(rstc);
                if (ret == -EPROBE_DEFER)
-                       goto err;
+                       goto err_qspi_release;
        } else {
                reset_control_assert(rstc);
                udelay(2);
        platform_set_drvdata(pdev, qspi);
        ret = stm32_qspi_dma_setup(qspi);
        if (ret)
-               goto err;
+               goto err_qspi_release;
 
        mutex_init(&qspi->lock);
 
        if (!ret)
                return 0;
 
-err:
+err_qspi_release:
        stm32_qspi_release(qspi);
+err_master_put:
        spi_master_put(qspi->ctrl);
 
        return ret;