drm/i915: Nuke skl_wrpll_context_init()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Mar 2022 17:31:18 +0000 (19:31 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 4 Mar 2022 16:24:19 +0000 (18:24 +0200)
We can trivially replace skl_wrpll_context_init() with a single
designated initializer.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220301173128.6988-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_dpll_mgr.c

index f10eae7a75c66cf86fd27378379bf07f2fac92ee..0a7687fd8096300c5c36872f58508ad83bb4206b 100644 (file)
@@ -1333,13 +1333,6 @@ struct skl_wrpll_context {
        unsigned int p;                 /* chosen divider */
 };
 
-static void skl_wrpll_context_init(struct skl_wrpll_context *ctx)
-{
-       memset(ctx, 0, sizeof(*ctx));
-
-       ctx->min_deviation = U64_MAX;
-}
-
 /* DCO freq must be within +1%/-6%  of the DCO central freq */
 #define SKL_DCO_MAX_PDEVIATION 100
 #define SKL_DCO_MAX_NDEVIATION 600
@@ -1522,12 +1515,12 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
                { even_dividers, ARRAY_SIZE(even_dividers) },
                { odd_dividers, ARRAY_SIZE(odd_dividers) },
        };
-       struct skl_wrpll_context ctx;
+       struct skl_wrpll_context ctx = {
+               .min_deviation = U64_MAX,
+       };
        unsigned int dco, d, i;
        unsigned int p0, p1, p2;
 
-       skl_wrpll_context_init(&ctx);
-
        for (d = 0; d < ARRAY_SIZE(dividers); d++) {
                for (dco = 0; dco < ARRAY_SIZE(dco_central_freq); dco++) {
                        for (i = 0; i < dividers[d].n_dividers; i++) {