pnv/psi: Initialize the PSIHB interrupts to match hardware
authorFrederic Barrat <fbarrat@linux.ibm.com>
Mon, 3 Jul 2023 08:12:15 +0000 (10:12 +0200)
committerDaniel Henrique Barboza <danielhb413@gmail.com>
Fri, 7 Jul 2023 07:46:12 +0000 (04:46 -0300)
On the powernv9 and powernv10 machines, the PSIHB interrupts are
currently initialized with a PQ state of 0b01, i.e. interrupts are
disabled. However real hardware initializes them to 0b00 for the
PSIHB. This patch updates it, in case an hypervisor is in the mood of
checking it.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230703081215.55252-3-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
hw/ppc/pnv_psi.c

index 46da58dff825b97bdd08016202cdd029412eaea2..daaa2f0575fd654034855fd2f9f406a6c929a88f 100644 (file)
@@ -863,6 +863,8 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error **errp)
     object_property_set_int(OBJECT(xsrc), "nr-irqs", PSIHB9_NUM_IRQS,
                             &error_fatal);
     object_property_set_link(OBJECT(xsrc), "xive", OBJECT(psi), &error_abort);
+    object_property_set_int(OBJECT(xsrc), "reset-pq", XIVE_ESB_RESET,
+                            &error_abort);
     if (!qdev_realize(DEVICE(xsrc), NULL, errp)) {
         return;
     }