ARM: dts: qcom: msm8226: Add CCI bus

Add a node for the Camera Control Interface I2C bus found on MSM8226.

Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221002122859.75525-6-matti.lehtimaki@gmail.com

diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 70cea141bc444eb64d48f6f33ed4a3ebb012c4dc..81f30b66f4d73ca84d6a6e3448a519b9f60547bd 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
+#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
@@ -298,6 +299,33 @@
                        #size-cells = <0>;
                };
 
+               cci: cci@fda0c000 {
+                       compatible = "qcom,msm8226-cci";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xfda0c000 0x1000>;
+                       interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
+                                <&mmcc CAMSS_CCI_CCI_AHB_CLK>,
+                                <&mmcc CAMSS_CCI_CCI_CLK>;
+                       clock-names = "camss_top_ahb",
+                                     "cci_ahb",
+                                     "cci";
+
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&cci_default>;
+                       pinctrl-1 = <&cci_sleep>;
+
+                       status = "disabled";
+
+                       cci_i2c0: i2c-bus@0 {
+                               reg = <0>;
+                               clock-frequency = <400000>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+
                usb: usb@f9a55000 {
                        compatible = "qcom,ci-hdrc";
                        reg = <0xf9a55000 0x200>,
@@ -389,6 +417,22 @@
                                bias-disable;
                        };
 
+                       cci_default: cci-default-state {
+                               pins = "gpio29", "gpio30";
+                               function = "cci_i2c0";
+
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
+                       cci_sleep: cci-sleep-state {
+                               pins = "gpio29", "gpio30";
+                               function = "gpio";
+
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
                        sdhc1_default_state: sdhc1-default-state {
                                clk-pins {
                                        pins = "sdc1_clk";