arm64: dts: qcom: qcm2290: Add CPU idle states

Add the (scarce) idle states for the individual CPUs, as well as the
whole cluster. This enables deeper-than-WFI cpuidle

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230606-topic-qcm2290_idlestates-v2-1-580a5a2d28c9@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index ae5abc76bcc785ab63c8b803338ad5f06916b10b..82de2f8a6180a8883fbd9166c9ad544cf6b2b710 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -48,6 +48,8 @@
                        enable-method = "psci";
                        next-level-cache = <&L2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
+                       power-domains = <&CPU_PD0>;
+                       power-domain-names = "psci";
                        L2_0: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
@@ -64,6 +66,8 @@
                        enable-method = "psci";
                        next-level-cache = <&L2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
+                       power-domains = <&CPU_PD1>;
+                       power-domain-names = "psci";
                };
 
                CPU2: cpu@2 {
@@ -76,6 +80,8 @@
                        enable-method = "psci";
                        next-level-cache = <&L2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
+                       power-domains = <&CPU_PD2>;
+                       power-domain-names = "psci";
                };
 
                CPU3: cpu@3 {
@@ -88,6 +94,8 @@
                        enable-method = "psci";
                        next-level-cache = <&L2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
+                       power-domains = <&CPU_PD3>;
+                       power-domain-names = "psci";
                };
 
                cpu-map {
@@ -109,6 +117,30 @@
                                };
                        };
                };
+
+               domain-idle-states {
+                       CLUSTER_SLEEP: cluster-sleep-0 {
+                               compatible = "domain-idle-state";
+                               arm,psci-suspend-param = <0x41000043>;
+                               entry-latency-us = <800>;
+                               exit-latency-us = <2118>;
+                               min-residency-us = <7376>;
+                       };
+               };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       CPU_SLEEP: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "power-collapse";
+                               arm,psci-suspend-param = <0x40000003>;
+                               entry-latency-us = <290>;
+                               exit-latency-us = <376>;
+                               min-residency-us = <1182>;
+                               local-timer-stop;
+                       };
+               };
        };
 
        firmware {
@@ -134,6 +166,35 @@
        psci {
                compatible = "arm,psci-1.0";
                method = "smc";
+
+               CPU_PD0: power-domain-cpu0 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&CPU_SLEEP>;
+               };
+
+               CPU_PD1: power-domain-cpu1 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&CPU_SLEEP>;
+               };
+
+               CPU_PD2: power-domain-cpu2 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&CPU_SLEEP>;
+               };
+
+               CPU_PD3: power-domain-cpu3 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&CPU_SLEEP>;
+               };
+
+               CLUSTER_PD: power-domain-cpu-cluster {
+                       #power-domain-cells = <0>;
+                       domain-idle-states = <&CLUSTER_SLEEP>;
+               };
        };
 
        reserved_memory: reserved-memory {