drm/i915: Replace hand rolled PLL state dump with intel_dpll_dump_hw_state()

Just use intel_dpll_dump_hw_state() instead of hand rolling it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240412182703.19916-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 0feffe8d4e453ab200850c0745c892b6d999f947..73be72bf3f5cc31f4aedd127d9ba592e03761fb7 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -638,6 +638,7 @@ static int i915_display_capabilities(struct seq_file *m, void *unused)
 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
 {
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
+       struct drm_printer p = drm_seq_file_printer(m);
        struct intel_shared_dpll *pll;
        int i;
 
@@ -654,35 +655,7 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
                           pll->state.pipe_mask, pll->active_mask,
                           str_yes_no(pll->on));
                seq_printf(m, " tracked hardware state:\n");
-               seq_printf(m, " dpll:    0x%08x\n", pll->state.hw_state.dpll);
-               seq_printf(m, " dpll_md: 0x%08x\n",
-                          pll->state.hw_state.dpll_md);
-               seq_printf(m, " fp0:     0x%08x\n", pll->state.hw_state.fp0);
-               seq_printf(m, " fp1:     0x%08x\n", pll->state.hw_state.fp1);
-               seq_printf(m, " wrpll:   0x%08x\n", pll->state.hw_state.wrpll);
-               seq_printf(m, " cfgcr0:  0x%08x\n", pll->state.hw_state.cfgcr0);
-               seq_printf(m, " cfgcr1:  0x%08x\n", pll->state.hw_state.cfgcr1);
-               seq_printf(m, " div0:    0x%08x\n", pll->state.hw_state.div0);
-               seq_printf(m, " mg_refclkin_ctl:        0x%08x\n",
-                          pll->state.hw_state.mg_refclkin_ctl);
-               seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n",
-                          pll->state.hw_state.mg_clktop2_coreclkctl1);
-               seq_printf(m, " mg_clktop2_hsclkctl:    0x%08x\n",
-                          pll->state.hw_state.mg_clktop2_hsclkctl);
-               seq_printf(m, " mg_pll_div0:  0x%08x\n",
-                          pll->state.hw_state.mg_pll_div0);
-               seq_printf(m, " mg_pll_div1:  0x%08x\n",
-                          pll->state.hw_state.mg_pll_div1);
-               seq_printf(m, " mg_pll_lf:    0x%08x\n",
-                          pll->state.hw_state.mg_pll_lf);
-               seq_printf(m, " mg_pll_frac_lock: 0x%08x\n",
-                          pll->state.hw_state.mg_pll_frac_lock);
-               seq_printf(m, " mg_pll_ssc:   0x%08x\n",
-                          pll->state.hw_state.mg_pll_ssc);
-               seq_printf(m, " mg_pll_bias:  0x%08x\n",
-                          pll->state.hw_state.mg_pll_bias);
-               seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
-                          pll->state.hw_state.mg_pll_tdc_coldst_bias);
+               intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state);
        }
        drm_modeset_unlock_all(&dev_priv->drm);