drm/amd/display: Update idle optimization handling
authorJoshua Aberback <joshua.aberback@amd.com>
Mon, 31 Aug 2020 05:58:03 +0000 (01:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Sep 2020 21:52:41 +0000 (17:52 -0400)
[How]
 - use dc interface instead of hwss interface in cursor functions, to keep
dc->idle_optimizations_allowed updated
 - add dc interface to check if idle optimizations might apply to a plane

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
drivers/gpu/drm/amd/display/dc/dc.h

index 1190c58275c3aad35b3ec4f9109fcb50a7cbd472..7ab82d6a5630cf4b1d1576356b74e151a74c7e1f 100644 (file)
@@ -3039,4 +3039,10 @@ void dc_lock_memory_clock_frequency(struct dc *dc)
                if (dc->current_state->res_ctx.pipe_ctx[i].plane_state)
                        core_link_enable_stream(dc->current_state, &dc->current_state->res_ctx.pipe_ctx[i]);
 }
+
+bool dc_is_plane_eligible_for_idle_optimizaitons(struct dc *dc,
+                                                struct dc_plane_state *plane)
+{
+       return false;
+}
 #endif
index f42a17d765e375f0ceb3609fe695e1dfdaa84a03..6fef9078f3d174173fe68f763430c0409e542522 100644 (file)
@@ -298,7 +298,7 @@ bool dc_stream_set_cursor_attributes(
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
        /* disable idle optimizations while updating cursor */
        if (dc->idle_optimizations_allowed) {
-               dc->hwss.apply_idle_power_optimizations(dc, false);
+               dc_allow_idle_optimizations(dc, false);
                reset_idle_optimizations = true;
        }
 
@@ -326,7 +326,7 @@ bool dc_stream_set_cursor_attributes(
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
        /* re-enable idle optimizations if necessary */
        if (reset_idle_optimizations)
-               dc->hwss.apply_idle_power_optimizations(dc, true);
+               dc_allow_idle_optimizations(dc, true);
 
 #endif
        return true;
@@ -359,9 +359,8 @@ bool dc_stream_set_cursor_position(
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
 
        /* disable idle optimizations if enabling cursor */
-       if (dc->idle_optimizations_allowed &&
-                       !stream->cursor_position.enable && position->enable) {
-               dc->hwss.apply_idle_power_optimizations(dc, false);
+       if (dc->idle_optimizations_allowed && !stream->cursor_position.enable && position->enable) {
+               dc_allow_idle_optimizations(dc, false);
                reset_idle_optimizations = true;
        }
 
@@ -392,7 +391,7 @@ bool dc_stream_set_cursor_position(
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
        /* re-enable idle optimizations if necessary */
        if (reset_idle_optimizations)
-               dc->hwss.apply_idle_power_optimizations(dc, true);
+               dc_allow_idle_optimizations(dc, true);
 
 #endif
        return true;
index 8631d290afee849e699d944aa85337ae57224ca9..9d7d5dd9e82084e3f007e2237334f249fe329599 100644 (file)
@@ -1250,6 +1250,9 @@ enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32
 void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg);
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
 
+bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc,
+                                                struct dc_plane_state *plane);
+
 void dc_allow_idle_optimizations(struct dc *dc, bool allow);
 
 /*