arm64: tegra: Add Host1x and VIC on Tegra234

Add device tree nodes for Host1x and VIC on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 8225f51313fcf14475c7a19fa30518d58eb135d4..23c40e6d3160c2410b963c9ca375fc5578ac6477 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -541,6 +541,52 @@
                        status = "okay";
                };
 
+               host1x@13e00000 {
+                       compatible = "nvidia,tegra234-host1x";
+                       reg = <0x13e00000 0x10000>,
+                             <0x13e10000 0x10000>,
+                             <0x13e40000 0x10000>;
+                       reg-names = "common", "hypervisor", "vm";
+                       interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4",
+                                         "syncpt5", "syncpt6", "syncpt7", "host1x";
+                       clocks = <&bpmp TEGRA234_CLK_HOST1X>;
+                       clock-names = "host1x";
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ranges = <0x15000000 0x15000000 0x01000000>;
+                       interconnects = <&mc TEGRA234_MEMORY_CLIENT_HOST1XDMAR &emc>;
+                       interconnect-names = "dma-mem";
+                       iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
+
+                       vic@15340000 {
+                               compatible = "nvidia,tegra234-vic";
+                               reg = <0x15340000 0x00040000>;
+                               interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&bpmp TEGRA234_CLK_VIC>;
+                               clock-names = "vic";
+                               resets = <&bpmp TEGRA234_RESET_VIC>;
+                               reset-names = "vic";
+
+                               power-domains = <&bpmp TEGRA234_POWER_DOMAIN_VIC>;
+                               interconnects = <&mc TEGRA234_MEMORY_CLIENT_VICSRD &emc>,
+                                               <&mc TEGRA234_MEMORY_CLIENT_VICSWR &emc>;
+                               interconnect-names = "dma-mem", "write";
+                               iommus = <&smmu_niso1 TEGRA234_SID_VIC>;
+                               dma-coherent;
+                       };
+               };
+
                gpio: gpio@2200000 {
                        compatible = "nvidia,tegra234-gpio";
                        reg-names = "security", "gpio";