arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0

Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

While here, also remove the undocumented and also not used
'mediatek,syscon-dsi' property.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index de12f78c2ee0cd011f8ccff436f0130e1202d14d..ba4584faca5aead67a7ad232500a3e4e8b40178b 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1319,6 +1319,7 @@
                        compatible = "mediatek,mt8183-mmsys", "syscon";
                        reg = <0 0x14000000 0 0x1000>;
                        #clock-cells = <1>;
+                       #reset-cells = <1>;
                        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
                                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
                        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
@@ -1433,11 +1434,11 @@
                        reg = <0 0x14014000 0 0x1000>;
                        interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
                        power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
-                       mediatek,syscon-dsi = <&mmsys 0x140>;
                        clocks = <&mmsys CLK_MM_DSI0_MM>,
                                 <&mmsys CLK_MM_DSI0_IF>,
                                 <&mipi_tx0>;
                        clock-names = "engine", "digital", "hs";
+                       resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
                        phys = <&mipi_tx0>;
                        phy-names = "dphy";
                };

diff --git a/include/dt-bindings/reset/mt8183-resets.h b/include/dt-bindings/reset/mt8183-resets.h
index a1bbd41e0d128d36a2dfa60919a6cc60bac98772..48c5d2de0a383a2a6fae8deb471250c95d7e7e1d 100644 (file)
--- a/include/dt-bindings/reset/mt8183-resets.h
+++ b/include/dt-bindings/reset/mt8183-resets.h
@@ -80,6 +80,9 @@
 
 #define MT8183_INFRACFG_SW_RST_NUM                             128
 
+/* MMSYS resets */
+#define MT8183_MMSYS_SW0_RST_B_DISP_DSI0                       25
+
 #define MT8183_TOPRGU_MM_SW_RST                                        1
 #define MT8183_TOPRGU_MFG_SW_RST                               2
 #define MT8183_TOPRGU_VENC_SW_RST                              3