MIPS: lantiq: register smp_ops on non-smp platforms
authorAleksander Jan Bajkowski <olek2@wp.pl>
Mon, 22 Jan 2024 18:47:09 +0000 (19:47 +0100)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Fri, 26 Jan 2024 09:36:21 +0000 (10:36 +0100)
Lantiq uses a common kernel config for devices with 24Kc and 34Kc cores.
The changes made previously to add support for interrupts on all cores
work on 24Kc platforms with SMP disabled and 34Kc platforms with SMP
enabled. This patch fixes boot issues on Danube (single core 24Kc) with
SMP enabled.

Fixes: 730320fd770d ("MIPS: lantiq: enable all hardware interrupts on second VPE")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/lantiq/prom.c

index a3cf293658581ed6a599da2b870f3c10c67a6be1..0c45767eacf67429ea3910628a2f44c219a4da34 100644 (file)
@@ -108,10 +108,9 @@ void __init prom_init(void)
        prom_init_cmdline();
 
 #if defined(CONFIG_MIPS_MT_SMP)
-       if (cpu_has_mipsmt) {
-               lantiq_smp_ops = vsmp_smp_ops;
+       lantiq_smp_ops = vsmp_smp_ops;
+       if (cpu_has_mipsmt)
                lantiq_smp_ops.init_secondary = lantiq_init_secondary;
-               register_smp_ops(&lantiq_smp_ops);
-       }
+       register_smp_ops(&lantiq_smp_ops);
 #endif
 }