thermal/drivers/imx8mm: Enable ADC when enabling monitor
authorPaul Gerber <Paul.Gerber@tq-group.com>
Mon, 22 Nov 2021 11:42:25 +0000 (12:42 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 10:03:23 +0000 (11:03 +0100)
[ Upstream commit 3de89d8842a2b5d3dd22ebf97dd561ae0a330948 ]

The i.MX 8MP has a ADC_PD bit in the TMU_TER register that controls the
operating mode of the ADC:
* 0 means normal operating mode
* 1 means power down mode

When enabling/disabling the TMU, the ADC operating mode must be set
accordingly.

i.MX 8M Mini & Nano are lacking this bit.

Signed-off-by: Paul Gerber <Paul.Gerber@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Fixes: 2b8f1f0337c5 ("thermal: imx8mm: Add i.MX8MP support")
Link: https://lore.kernel.org/r/20211122114225.196280-1-alexander.stein@ew.tq-group.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/thermal/imx8mm_thermal.c

index 7442e013738f887020aa861d8cfbe45712942787..af666bd9e8d4d5de2379893f03ab3c151acce014 100644 (file)
@@ -21,6 +21,7 @@
 #define TPS                    0x4
 #define TRITSR                 0x20    /* TMU immediate temp */
 
+#define TER_ADC_PD             BIT(30)
 #define TER_EN                 BIT(31)
 #define TRITSR_TEMP0_VAL_MASK  0xff
 #define TRITSR_TEMP1_VAL_MASK  0xff0000
@@ -113,6 +114,8 @@ static void imx8mm_tmu_enable(struct imx8mm_tmu *tmu, bool enable)
 
        val = readl_relaxed(tmu->base + TER);
        val = enable ? (val | TER_EN) : (val & ~TER_EN);
+       if (tmu->socdata->version == TMU_VER2)
+               val = enable ? (val & ~TER_ADC_PD) : (val | TER_ADC_PD);
        writel_relaxed(val, tmu->base + TER);
 }