#define XEHP_SQCM XE_REG_MCR(0x8724)
#define EN_32B_ACCESS REG_BIT(30)
+#define XE2_FLAT_CCS_BASE_RANGE_LOWER XE_REG_MCR(0x8800)
+#define XE2_FLAT_CCS_ENABLE REG_BIT(0)
+
#define GSCPSMI_BASE XE_REG(0x880c)
#define MIRROR_FUSE3 XE_REG(0x9118)
#include <drm/drm_print.h>
#include <drm/xe_drm.h>
+#include "regs/xe_gt_regs.h"
#include "regs/xe_regs.h"
#include "xe_bo.h"
#include "xe_debugfs.h"
#include "xe_exec.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
+#include "xe_gt_mcr.h"
#include "xe_irq.h"
#include "xe_mmio.h"
#include "xe_module.h"
return 0;
}
+static int xe_device_set_has_flat_ccs(struct xe_device *xe)
+{
+ u32 reg;
+ int err;
+
+ if (GRAPHICS_VER(xe) < 20 || !xe->info.has_flat_ccs)
+ return 0;
+
+ struct xe_gt *gt = xe_root_mmio_gt(xe);
+
+ err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
+ if (err)
+ return err;
+
+ reg = xe_gt_mcr_unicast_read_any(gt, XE2_FLAT_CCS_BASE_RANGE_LOWER);
+ xe->info.has_flat_ccs = (reg & XE2_FLAT_CCS_ENABLE);
+
+ if (!xe->info.has_flat_ccs)
+ drm_dbg(&xe->drm,
+ "Flat CCS has been disabled in bios, May lead to performance impact");
+
+ return xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
+}
+
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
goto err_irq_shutdown;
}
+ err = xe_device_set_has_flat_ccs(xe);
+ if (err)
+ return err;
+
err = xe_mmio_probe_vram(xe);
if (err)
goto err_irq_shutdown;