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arm64: dts: qcom: sm8250: Mark SMMUs as DMA coherent
author
Konrad Dybcio
<konrad.dybcio@linaro.org>
Tue, 4 Jul 2023 12:23:18 +0000
(14:23 +0200)
committer
Bjorn Andersson
<andersson@kernel.org>
Mon, 10 Jul 2023 05:03:57 +0000
(22:03 -0700)
The SMMUs on SM8250 are cache-coherent. Mark them as such.
Fixes: a89441fcd09d ("arm64: dts: qcom: sm8250: add apps_smmu node")
Fixes: 04a3605b184e ("arm64: dts: qcom: add sm8250 GPU nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link:
https://lore.kernel.org/r/20230704-topic-8250_pcie_dmac-v1-2-799603a980b0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8250.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d0b21c48ea9b5bc24c0f27cbacabf6ccf4ee9485..6359e5d095447ace1f291a4282f85bdd9776fe79 100644
(file)
--- a/
arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/
arch/arm64/boot/dts/qcom/sm8250.dtsi
@@
-2729,6
+2729,7
@@
clock-names = "ahb", "bus", "iface";
power-domains = <&gpucc GPU_CX_GDSC>;
+ dma-coherent;
};
slpi: remoteproc@5c00000 {
@@
-5399,6
+5400,7
@@
<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
};
adsp: remoteproc@17300000 {