KVM: arm64: nv: Honor HFGITR_EL2.ERET being set

If the L1 hypervisor decides to trap ERETs while running L2,
make sure we don't try to emulate it, just like we wouldn't
if it had its NV bit set.

The exception will be reinjected from the core handler.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20240419102935.1935571-9-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index 390c7d99f617067c8561b334b0174d0c356fd3a4..26395171621ba70289489b48a1a130e30934b6e0 100644 (file)
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -220,7 +220,8 @@ static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code)
         * Unless the trap has to be forwarded further down the line,
         * of course...
         */
-       if (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_NV)
+       if ((__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_NV) ||
+           (__vcpu_sys_reg(vcpu, HFGITR_EL2) & HFGITR_EL2_ERET))
                return false;
 
        spsr = read_sysreg_el1(SYS_SPSR);