coresight: etm4x: Fix issues on trcseqevr access

The TRCSEQEVR(3) is reserved, using '@nrseqstate - 1' instead to avoid
accessing the reserved register.

Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: Jonathan Zhou <jonathan.zhouwen@huawei.com>
[Fixed capital letter in title]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200916191737.4001561-12-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 63cb1e0d595372417f9082edfefa42d1c036f840..b29ad4f7fac24b462d58ba1e67181f11333947e4 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1193,7 +1193,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
        state->trcvdsacctlr = readl(drvdata->base + TRCVDSACCTLR);
        state->trcvdarcctlr = readl(drvdata->base + TRCVDARCCTLR);
 
-       for (i = 0; i < drvdata->nrseqstate; i++)
+       for (i = 0; i < drvdata->nrseqstate - 1; i++)
                state->trcseqevr[i] = readl(drvdata->base + TRCSEQEVRn(i));
 
        state->trcseqrstevr = readl(drvdata->base + TRCSEQRSTEVR);
@@ -1298,7 +1298,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
        writel_relaxed(state->trcvdsacctlr, drvdata->base + TRCVDSACCTLR);
        writel_relaxed(state->trcvdarcctlr, drvdata->base + TRCVDARCCTLR);
 
-       for (i = 0; i < drvdata->nrseqstate; i++)
+       for (i = 0; i < drvdata->nrseqstate - 1; i++)
                writel_relaxed(state->trcseqevr[i],
                               drvdata->base + TRCSEQEVRn(i));