arm64: dts: mediatek: cherry: Add support for internal eMMC storage

Add mtk-sd controller and pin configuration to enable the internal
eMMC storage: now it is possible to mount a rootfs located at the
internal storage.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220704101321.44835-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index c9b2c7246ce156b6316d8fe474eaa5f841540719..3cbdc918f54764858e845c7221f26863438254af 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -9,6 +9,7 @@
 
 / {
        aliases {
+               mmc0 = &mmc0;
                serial0 = &uart0;
        };
 
@@ -89,6 +90,26 @@
        };
 };
 
+&mmc0 {
+       status = "okay";
+
+       bus-width = <8>;
+       cap-mmc-highspeed;
+       cap-mmc-hw-reset;
+       hs400-ds-delay = <0x14c11>;
+       max-frequency = <200000000>;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       no-sdio;
+       no-sd;
+       non-removable;
+       pinctrl-names = "default", "state_uhs";
+       pinctrl-0 = <&mmc0_pins_default>;
+       pinctrl-1 = <&mmc0_pins_uhs>;
+       vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
+       vqmmc-supply = <&mt6359_vufs_ldo_reg>;
+};
+
 /* for CPU-L */
 &mt6359_vcore_buck_reg {
        regulator-always-on;
@@ -125,6 +146,72 @@
        regulator-always-on;
 };
 
+&pio {
+       mmc0_pins_default: mmc0-default-pins {
+               pins-cmd-dat {
+                       pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
+                                <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
+                                <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
+                                <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
+                                <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
+                                <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
+                                <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
+                                <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
+                                <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
+                       input-enable;
+                       drive-strength = <6>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+               };
+
+               pins-clk {
+                       pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
+                       drive-strength = <6>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+               };
+
+               pins-rst {
+                       pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
+                       drive-strength = <6>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+               };
+       };
+
+       mmc0_pins_uhs: mmc0-uhs-pins {
+               pins-cmd-dat {
+                       pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
+                                <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
+                                <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
+                                <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
+                                <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
+                                <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
+                                <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
+                                <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
+                                <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
+                       input-enable;
+                       drive-strength = <8>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+               };
+
+               pins-clk {
+                       pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
+                       drive-strength = <8>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+               };
+
+               pins-ds {
+                       pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
+                       drive-strength = <8>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+               };
+
+               pins-rst {
+                       pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
+                       drive-strength = <8>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+               };
+       };
+};
+
 &pmic {
        interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
 };