intel: legacy: field prep conversion

Refactor several older Intel drivers to use FIELD_PREP(), which reduces
lines of code and adds clarity of intent.

This code was generated by the following coccinelle/spatch script and
then manually repaired.

@prep2@
constant shift,mask;
type T;
expression a;
@@
-(((T)(a) << shift) & mask)
+FIELD_PREP(mask, a)

@prep@
constant shift,mask;
type T;
expression a;
@@
-((T)((a) << shift) & mask)
+FIELD_PREP(mask, a)

Cc: Julia Lawall <Julia.Lawall@inria.fr>
Reviewed-by: Marcin Szycik <marcin.szycik@linux.intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>

diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
index 74671201208ee3d272b6de012d7064839810dfe9..31fce3e4e8afc37db63b9238273fcbd35c5f10b5 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/80003es2lan.c
+++ b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
@@ -1210,8 +1210,8 @@ static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
        if (ret_val)
                return ret_val;
 
-       kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
-                      E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+       kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) |
+                     E1000_KMRNCTRLSTA_REN;
        ew32(KMRNCTRLSTA, kmrnctrlsta);
        e1e_flush();
 
@@ -1245,8 +1245,7 @@ static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
        if (ret_val)
                return ret_val;
 
-       kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
-                      E1000_KMRNCTRLSTA_OFFSET) | data;
+       kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) | data;
        ew32(KMRNCTRLSTA, kmrnctrlsta);
        e1e_flush();
 

diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
index 08c3d477dd6f799f020a9a90f72417258bfd91c6..2498f021eb021c5e7a12c4f9996a6748327628c5 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/phy.c
+++ b/drivers/net/ethernet/intel/e1000e/phy.c
@@ -463,8 +463,8 @@ static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
                        return ret_val;
        }
 
-       kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
-                      E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+       kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) |
+                     E1000_KMRNCTRLSTA_REN;
        ew32(KMRNCTRLSTA, kmrnctrlsta);
        e1e_flush();
 
@@ -536,8 +536,7 @@ static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
                        return ret_val;
        }
 
-       kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
-                      E1000_KMRNCTRLSTA_OFFSET) | data;
+       kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) | data;
        ew32(KMRNCTRLSTA, kmrnctrlsta);
        e1e_flush();
 

diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
index ae700a1807c6577193d364d4fb822981d6e7a07e..1eea0ec5dbcfbe6496a24f0f58dffd3f94a29cfe 100644 (file)
--- a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
+++ b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
@@ -866,8 +866,7 @@ static s32 fm10k_iov_assign_default_mac_vlan_pf(struct fm10k_hw *hw,
         * register is RO from the VF, so the PF must do this even in the
         * case of notifying the VF of a new VID via the mailbox.
         */
-       txqctl = ((u32)vf_vid << FM10K_TXQCTL_VID_SHIFT) &
-                FM10K_TXQCTL_VID_MASK;
+       txqctl = FIELD_PREP(FM10K_TXQCTL_VID_MASK, vf_vid);
        txqctl |= (vf_idx << FM10K_TXQCTL_TC_SHIFT) |
                  FM10K_TXQCTL_VF | vf_idx;
 

diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 3c1b562a3271c1a3663213731123d2c3aeab6226..c84e7356cdb14e012e161e322f3925ce60c8442a 100644 (file)
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -255,7 +255,7 @@ s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)
        }
 
        /* Need to byte-swap the 16-bit value. */
-       *data = ((i2ccmd >> 8) & 0x00FF) | ((i2ccmd << 8) & 0xFF00);
+       *data = ((i2ccmd >> 8) & 0x00FF) | FIELD_PREP(0xFF00, i2ccmd);
 
        return 0;
 }
@@ -282,7 +282,7 @@ s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)
        }
 
        /* Swap the data bytes for the I2C interface */
-       phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
+       phy_data_swapped = ((data >> 8) & 0x00FF) | FIELD_PREP(0xFF00, data);
 
        /* Set up Op-code, Phy Address, and register address in the I2CCMD
         * register.  The MAC will take care of interfacing with the

diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c
index d868a70732f473f637c3b99ecdc105f21bf17d62..9d79ea3cd528dbfdb0f5352db787165fb16abf2b 100644 (file)
--- a/drivers/net/ethernet/intel/igb/igb_ethtool.c
+++ b/drivers/net/ethernet/intel/igb/igb_ethtool.c
@@ -2711,8 +2711,7 @@ static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
        etqf |= (etype & E1000_ETQF_ETYPE_MASK);
 
        etqf &= ~E1000_ETQF_QUEUE_MASK;
-       etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
-               & E1000_ETQF_QUEUE_MASK);
+       etqf |= FIELD_PREP(E1000_ETQF_QUEUE_MASK, input->action);
        etqf |= E1000_ETQF_QUEUE_ENABLE;
 
        wr32(E1000_ETQF(i), etqf);

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index b2295caa2f0abd47674d68c0c11b1b869cdf70b9..897eb36bb609bcfd1bf7c6d4a984ceca91493d53 100644 (file)
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -9810,8 +9810,7 @@ static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
                         tx_rate;
 
                bcnrc_val = E1000_RTTBCNRC_RS_ENA;
-               bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
-                             E1000_RTTBCNRC_RF_INT_MASK);
+               bcnrc_val |= FIELD_PREP(E1000_RTTBCNRC_RF_INT_MASK, rf_int);
                bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
        } else {
                bcnrc_val = 0;
@@ -10000,8 +9999,7 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
                        hwm = 64 * (pba - 6);
                        reg = rd32(E1000_FCRTC);
                        reg &= ~E1000_FCRTC_RTH_COAL_MASK;
-                       reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
-                               & E1000_FCRTC_RTH_COAL_MASK);
+                       reg |= FIELD_PREP(E1000_FCRTC_RTH_COAL_MASK, hwm);
                        wr32(E1000_FCRTC, reg);
 
                        /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
@@ -10010,8 +10008,7 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
                        dmac_thr = pba - 10;
                        reg = rd32(E1000_DMACR);
                        reg &= ~E1000_DMACR_DMACTHR_MASK;
-                       reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
-                               & E1000_DMACR_DMACTHR_MASK);
+                       reg |= FIELD_PREP(E1000_DMACR_DMACTHR_MASK, dmac_thr);
 
                        /* transition to L0x or L1 if available..*/
                        reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
index 100388968e4dbd7f0b7eff1f1b5941f2a7c5ca90..0470b69d834c019e5ae09d57c8e93cc716a30cd7 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
@@ -794,7 +794,7 @@ static s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
 
        rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar));
        rar_high &= ~IXGBE_RAH_VIND_MASK;
-       rar_high |= ((vmdq << IXGBE_RAH_VIND_SHIFT) & IXGBE_RAH_VIND_MASK);
+       rar_high |= FIELD_PREP(IXGBE_RAH_VIND_MASK, vmdq);
        IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high);
        return 0;
 }

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
index 7311bd545acf3eee50b1929fb1698ab05bf8882f..18d63c8c2ff4df920bdd5b89ed0c607a965d683d 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
@@ -670,8 +670,8 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
                        int fcoe_i_h = fcoe->offset + ((i + fcreta_size) %
                                                        fcoe->indices);
                        fcoe_q_h = adapter->rx_ring[fcoe_i_h]->reg_idx;
-                       fcoe_q_h = (fcoe_q_h << IXGBE_FCRETA_ENTRY_HIGH_SHIFT) &
-                                  IXGBE_FCRETA_ENTRY_HIGH_MASK;
+                       fcoe_q_h = FIELD_PREP(IXGBE_FCRETA_ENTRY_HIGH_MASK,
+                                             fcoe_q_h);
                }
 
                fcoe_i = fcoe->offset + (i % fcoe->indices);