drm/i915/display/dsi: Add support to pipe D

Adding pipe D support to DSI transcoder.
Not adding it for EDP transcoder code paths as only TGL has 4 pipes
and it do not have a EDP transcoder.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191107214559.77087-2-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 8eb2d7f29c8253d65b199bd1763f6461a75f50f6..f688207932e007c89eed663005f00a135393022e 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -745,6 +745,9 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
                case PIPE_C:
                        tmp |= TRANS_DDI_EDP_INPUT_C_ONOFF;
                        break;
+               case PIPE_D:
+                       tmp |= TRANS_DDI_EDP_INPUT_D_ONOFF;
+                       break;
                }
 
                /* enable DDI buffer */
@@ -1325,6 +1328,9 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
                case TRANS_DDI_EDP_INPUT_C_ONOFF:
                        *pipe = PIPE_C;
                        break;
+               case TRANS_DDI_EDP_INPUT_D_ONOFF:
+                       *pipe = PIPE_D;
+                       break;
                default:
                        DRM_ERROR("Invalid PIPE input\n");
                        goto out;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 585750676c819544e67a534bb264bee7f3dd0b8e..526fb0b208a8a5197aadec28819d4e72401f5c0e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9675,6 +9675,7 @@ enum skl_power_gate {
 #define  TRANS_DDI_EDP_INPUT_A_ONOFF   (4 << 12)
 #define  TRANS_DDI_EDP_INPUT_B_ONOFF   (5 << 12)
 #define  TRANS_DDI_EDP_INPUT_C_ONOFF   (6 << 12)
+#define  TRANS_DDI_EDP_INPUT_D_ONOFF   (7 << 12)
 #define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK   REG_GENMASK(11, 10)
 #define  TRANS_DDI_MST_TRANSPORT_SELECT(trans) \
        REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, trans)