u32                     channel;
 };
 
-static int spmi_controller_wait_for_done(struct spmi_controller_dev *ctrl_dev,
+static int spmi_controller_wait_for_done(struct device *dev,
+                                        struct spmi_controller_dev *ctrl_dev,
                                         void __iomem *base, u8 sid, u16 addr)
 {
        u32 status = 0;
 
                if (status & SPMI_APB_TRANS_DONE) {
                        if (status & SPMI_APB_TRANS_FAIL) {
-                               dev_err(ctrl_dev->dev,
-                                       "%s: transaction failed (0x%x)\n",
+                               dev_err(dev, "%s: transaction failed (0x%x)\n",
                                        __func__, status);
                                return -EIO;
                        }
+                       dev_dbg(dev, "%s: status 0x%x\n", __func__, status);
                        return 0;
                }
                udelay(1);
        }
 
-       dev_err(ctrl_dev->dev,
-               "%s: timeout, status 0x%x\n",
-               __func__, status);
+       dev_err(dev, "%s: timeout, status 0x%x\n", __func__, status);
        return -ETIMEDOUT;
 }
 
        u8 op_code, i;
 
        if (bc > SPMI_CONTROLLER_MAX_TRANS_BYTES) {
-               dev_err(spmi_controller->dev
-               , "spmi_controller supports 1..%d bytes per trans, but:%ld requested"
-                                       , SPMI_CONTROLLER_MAX_TRANS_BYTES, bc);
+               dev_err(&ctrl->dev,
+                       "spmi_controller supports 1..%d bytes per trans, but:%ld requested",
+                       SPMI_CONTROLLER_MAX_TRANS_BYTES, bc);
                return  -EINVAL;
        }
 
        } else if (opc == SPMI_CMD_EXT_READL) {
                op_code = SPMI_CMD_EXT_REG_READ_L;
        } else {
-               dev_err(spmi_controller->dev, "invalid read cmd 0x%x", opc);
+               dev_err(&ctrl->dev, "invalid read cmd 0x%x", opc);
                return -EINVAL;
        }
 
 
        writel(cmd, spmi_controller->base + chnl_ofst + SPMI_APB_SPMI_CMD_BASE_ADDR);
 
-       rc = spmi_controller_wait_for_done(spmi_controller,
+       rc = spmi_controller_wait_for_done(&ctrl->dev, spmi_controller,
                                           spmi_controller->base, sid, addr);
        if (rc)
                goto done;
 done:
        spin_unlock_irqrestore(&spmi_controller->lock, flags);
        if (rc)
-               dev_err(spmi_controller->dev, "spmi read wait timeout op:0x%x sid:%d addr:0x%x bc:%ld\n",
+               dev_err(&ctrl->dev,
+                       "spmi read wait timeout op:0x%x sid:%d addr:0x%x bc:%ld\n",
                        opc, sid, addr, bc + 1);
        else
-               dev_dbg(spmi_controller->dev, "%s: id:%d addr:0x%x, read value: %*ph\n",
+               dev_dbg(&ctrl->dev, "%s: id:%d addr:0x%x, read value: %*ph\n",
                        __func__, sid, addr, (int)bc, __buf);
 
        return rc;
        u8 op_code, i;
 
        if (bc > SPMI_CONTROLLER_MAX_TRANS_BYTES) {
-               dev_err(spmi_controller->dev
-               , "spmi_controller supports 1..%d bytes per trans, but:%ld requested"
-                                       , SPMI_CONTROLLER_MAX_TRANS_BYTES, bc);
+               dev_err(&ctrl->dev,
+                       "spmi_controller supports 1..%d bytes per trans, but:%ld requested",
+                       SPMI_CONTROLLER_MAX_TRANS_BYTES, bc);
                return  -EINVAL;
        }
 
        } else if (opc == SPMI_CMD_EXT_WRITEL) {
                op_code = SPMI_CMD_EXT_REG_WRITE_L;
        } else {
-               dev_err(spmi_controller->dev, "invalid write cmd 0x%x", opc);
+               dev_err(&ctrl->dev, "invalid write cmd 0x%x", opc);
                return -EINVAL;
        }
 
        /* Start the transaction */
        writel(cmd, spmi_controller->base + chnl_ofst + SPMI_APB_SPMI_CMD_BASE_ADDR);
 
-       rc = spmi_controller_wait_for_done(spmi_controller, spmi_controller->base, sid, addr);
+       rc = spmi_controller_wait_for_done(&ctrl->dev, spmi_controller,
+                                          spmi_controller->base, sid, addr);
        spin_unlock_irqrestore(&spmi_controller->lock, flags);
 
        if (rc)
-               dev_err(spmi_controller->dev, "spmi write wait timeout op:0x%x sid:%d addr:0x%x bc:%ld\n",
+               dev_err(&ctrl->dev, "spmi write wait timeout op:0x%x sid:%d addr:0x%x bc:%ld\n",
                        opc, sid, addr, bc);
        else
-               dev_dbg(spmi_controller->dev, "%s: id:%d addr:0x%x, wrote value: %*ph\n",
+               dev_dbg(&ctrl->dev, "%s: id:%d addr:0x%x, wrote value: %*ph\n",
                        __func__, sid, addr, (int)bc, __buf);
 
        return rc;