ASoC: SOF: amd: increase DSP cache window range
authorVijendar Mukunda <Vijendar.Mukunda@amd.com>
Fri, 20 Oct 2023 06:28:13 +0000 (11:58 +0530)
committerMark Brown <broonie@kernel.org>
Mon, 23 Oct 2023 12:29:55 +0000 (13:29 +0100)
Increase DSP cache window range to 2.5MB to align with ACP memory.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20231020062822.3913760-3-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/amd/acp.h

index 3d2c5f07ed445dbece04f1944ae0a7c8d585da37..205b434f087287b2e20b794114bc372d9918ffe6 100644 (file)
@@ -84,7 +84,7 @@
 #define EXCEPT_MAX_HDR_SIZE                    0x400
 #define AMD_STACK_DUMP_SIZE                    32
 
-#define SRAM1_SIZE                             0x13A000
+#define SRAM1_SIZE                             0x280000
 #define PROBE_STATUS_BIT                       BIT(31)
 
 #define ACP_FIRMWARE_SIGNATURE                 0x100