MIPS: BMIPS: Enable HARDIRQS_SW_RESEND
authorJustin Chen <justin.chen@broadcom.com>
Wed, 24 May 2017 17:55:16 +0000 (10:55 -0700)
committerJames Hogan <jhogan@kernel.org>
Mon, 13 Nov 2017 16:27:58 +0000 (16:27 +0000)
HW interrupts triggered when irq_disable() were being ignored. Enable
resending HW interrupts as SW interrupts.

This was causing an issue where the interrupts waking the system up from
a suspend state were not calling their interrupt handlers.

Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16116/
Signed-off-by: James Hogan <jhogan@kernel.org>
arch/mips/Kconfig

index b0dbc35d09e1b089ec92a31cbe03add272d20810..43411118dd4f8d1cab9b893d067df9178be3fab6 100644 (file)
@@ -232,6 +232,7 @@ config BMIPS_GENERIC
        select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
        select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
        select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
+       select HARDIRQS_SW_RESEND
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