drivers/perf: hisi: Remove unnecessary check of counter index

The sanity check for counter index has been done in the function
hisi_uncore_pmu_get_event_idx, so remove the redundant interface
hisi_uncore_pmu_counter_valid() and sanity check.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-2-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
index ac1a8c120a008c124b7f1b044647ecc39662c42f..38344b49d7af533de0aa4dfdac398b6458de8f4c 100644 (file)
--- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
@@ -65,29 +65,15 @@ static u32 hisi_ddrc_pmu_get_counter_offset(int cntr_idx)
 static u64 hisi_ddrc_pmu_read_counter(struct hisi_pmu *ddrc_pmu,
                                      struct hw_perf_event *hwc)
 {
-       /* Use event code as counter index */
-       u32 idx = GET_DDRC_EVENTID(hwc);
-
-       if (!hisi_uncore_pmu_counter_valid(ddrc_pmu, idx)) {
-               dev_err(ddrc_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return 0;
-       }
-
-       return readl(ddrc_pmu->base + hisi_ddrc_pmu_get_counter_offset(idx));
+       return readl(ddrc_pmu->base +
+                    hisi_ddrc_pmu_get_counter_offset(hwc->idx));
 }
 
 static void hisi_ddrc_pmu_write_counter(struct hisi_pmu *ddrc_pmu,
                                        struct hw_perf_event *hwc, u64 val)
 {
-       u32 idx = GET_DDRC_EVENTID(hwc);
-
-       if (!hisi_uncore_pmu_counter_valid(ddrc_pmu, idx)) {
-               dev_err(ddrc_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return;
-       }
-
        writel((u32)val,
-              ddrc_pmu->base + hisi_ddrc_pmu_get_counter_offset(idx));
+              ddrc_pmu->base + hisi_ddrc_pmu_get_counter_offset(hwc->idx));
 }
 
 /*

diff --git a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
index 3402f1a395a89e3196a6fecc664d41e2887dc30c..a4b8c7daefa630b4c024c4da8a727faecdd51740 100644 (file)
--- a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
@@ -51,29 +51,15 @@ static u32 hisi_hha_pmu_get_counter_offset(int cntr_idx)
 static u64 hisi_hha_pmu_read_counter(struct hisi_pmu *hha_pmu,
                                     struct hw_perf_event *hwc)
 {
-       u32 idx = hwc->idx;
-
-       if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
-               dev_err(hha_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return 0;
-       }
-
        /* Read 64 bits and like L3C, top 16 bits are RAZ */
-       return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx));
+       return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(hwc->idx));
 }
 
 static void hisi_hha_pmu_write_counter(struct hisi_pmu *hha_pmu,
                                       struct hw_perf_event *hwc, u64 val)
 {
-       u32 idx = hwc->idx;
-
-       if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
-               dev_err(hha_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return;
-       }
-
        /* Write 64 bits and like L3C, top 16 bits are WI */
-       writeq(val, hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx));
+       writeq(val, hha_pmu->base + hisi_hha_pmu_get_counter_offset(hwc->idx));
 }
 
 static void hisi_hha_pmu_write_evtype(struct hisi_pmu *hha_pmu, int idx,

diff --git a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
index 7d792435c2aa4e2f7889a8a022777ae90f3461e3..f73be6d76abca542084ff7b8698a279d268ff279 100644 (file)
--- a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
@@ -50,29 +50,15 @@ static u32 hisi_l3c_pmu_get_counter_offset(int cntr_idx)
 static u64 hisi_l3c_pmu_read_counter(struct hisi_pmu *l3c_pmu,
                                     struct hw_perf_event *hwc)
 {
-       u32 idx = hwc->idx;
-
-       if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) {
-               dev_err(l3c_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return 0;
-       }
-
        /* Read 64-bits and the upper 16 bits are RAZ */
-       return readq(l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx));
+       return readq(l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(hwc->idx));
 }
 
 static void hisi_l3c_pmu_write_counter(struct hisi_pmu *l3c_pmu,
                                       struct hw_perf_event *hwc, u64 val)
 {
-       u32 idx = hwc->idx;
-
-       if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) {
-               dev_err(l3c_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return;
-       }
-
        /* Write 64-bits and the upper 16 bits are WI */
-       writeq(val, l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx));
+       writeq(val, l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(hwc->idx));
 }
 
 static void hisi_l3c_pmu_write_evtype(struct hisi_pmu *l3c_pmu, int idx,

diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
index 5e2b5e12777f5dfcfe39ef1bf5900a8b32708cb4..44b7553a3e42d2e2e47e5865b1de0fdfd13ee798 100644 (file)
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
@@ -96,12 +96,6 @@ static bool hisi_validate_event_group(struct perf_event *event)
        return counters <= hisi_pmu->num_counters;
 }
 
-int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx)
-{
-       return idx >= 0 && idx < hisi_pmu->num_counters;
-}
-EXPORT_SYMBOL_GPL(hisi_uncore_pmu_counter_valid);
-
 int hisi_uncore_pmu_get_event_idx(struct perf_event *event)
 {
        struct hisi_pmu *hisi_pmu = to_hisi_pmu(event->pmu);
@@ -131,11 +125,6 @@ EXPORT_SYMBOL_GPL(hisi_uncore_pmu_identifier_attr_show);
 
 static void hisi_uncore_pmu_clear_event_idx(struct hisi_pmu *hisi_pmu, int idx)
 {
-       if (!hisi_uncore_pmu_counter_valid(hisi_pmu, idx)) {
-               dev_err(hisi_pmu->dev, "Unsupported event index:%d!\n", idx);
-               return;
-       }
-
        clear_bit(idx, hisi_pmu->pmu_events.used_mask);
 }
 

diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h
index 25b7cbe1f8185e20250749a96182c23daf63af56..6a7f5491ef7dfa3d6f05dfcf5fcefd722a11b0e0 100644 (file)
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.h
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h
@@ -78,7 +78,6 @@ struct hisi_pmu {
        u32 identifier;
 };
 
-int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx);
 int hisi_uncore_pmu_get_event_idx(struct perf_event *event);
 void hisi_uncore_pmu_read(struct perf_event *event);
 int hisi_uncore_pmu_add(struct perf_event *event, int flags);