wifi: rtw89: 8852c: refine power sequence to imporve power consumption
authorChia-Yuan Li <leo.li@realtek.com>
Fri, 26 Apr 2024 06:12:00 +0000 (14:12 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Thu, 2 May 2024 02:58:04 +0000 (10:58 +0800)
Power sequence is a flow to enable/disable WiFi card with hardware
parameters. Adjust power and clock parameters according to results
of internal simulation and verification, so apply them to have better
power consumption.

Signed-off-by: Chia-Yuan Li <leo.li@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240426061200.44262-2-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/rtw8852c.c

index efc772eb79a4a6b154cd278218279506f3b659cf..3571b41786d7cedb1b259c65a664cb8e3cb2cdf5 100644 (file)
@@ -203,6 +203,9 @@ static int rtw8852c_pwr_on_func(struct rtw89_dev *rtwdev)
        rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APDM_HPDN);
        rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS);
 
+       rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0,
+                          B_AX_OCP_L1_MASK, 0x7);
+
        ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_RDY_SYSPWR,
                                1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL);
        if (ret)
@@ -266,7 +269,7 @@ static int rtw8852c_pwr_on_func(struct rtw89_dev *rtwdev)
        ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SRAM2RFC);
        if (ret)
                return ret;
-       ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0, XTAL_SI_LDO_LPS);
+       ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0x10, XTAL_SI_LDO_LPS);
        if (ret)
                return ret;
        ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_4, 0, XTAL_SI_LPS_CAP);
@@ -361,8 +364,11 @@ static int rtw8852c_pwr_off_func(struct rtw89_dev *rtwdev)
        if (ret)
                return ret;
 
-       rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, 0x0001A0B0);
+       rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION);
        rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_XTAL_OFF_A_DIE);
+       rtw89_write32_set(rtwdev, R_AX_SYS_SWR_CTRL1, B_AX_SYM_CTRL_SPS_PWMFREQ);
+       rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0,
+                          B_AX_REG_ZCDC_H_MASK, 0x3);
        rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS);
 
        return 0;